Abstract
Cellular Automata(CA) based VLSI implementation of t-byte errors correcting code has been established by previous research to be superior to the other existing techniques employed for realizing Reed-Solomon(RS) code. However, the scheme suffers from the limitation that it can correct t −byte errors (t ≥ 2) provided errors are confined either wholly to the information bytes or entirely to the check bytes. The work reported in the present paper overcomes this limitation and corrects the errors likely in both information and check bytes. Moreover one weakness found in an earlier similar work has been identified and rectified using a modified check symbol expressions.
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Bhaumik, J., Chowdhury, D.R., Chakrabarti, I. (2008). An Improved Double Byte Error Correcting Code Using Cellular Automata. In: Umeo, H., Morishita, S., Nishinari, K., Komatsuzaki, T., Bandini, S. (eds) Cellular Automata. ACRI 2008. Lecture Notes in Computer Science, vol 5191. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-79992-4_60
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DOI: https://doi.org/10.1007/978-3-540-79992-4_60
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