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Retargetable Graph-Coloring Register Allocation for Irregular Architectures

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Software and Compilers for Embedded Systems (SCOPES 2003)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2826))

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Abstract

Global register allocation is one of the most important optimizations in a compiler. Since the early 80’s, register allocation by graph coloring has been the dominant approach. The traditional formulation of graph-coloring register allocation implicitly assumes a single bank of non-overlapping general-purpose registers and does not handle irregular architectural features like overlapping register pairs, special purpose registers, and multiple register banks. We present a generalization of graph-coloring register allocation that can handle all such irregularities. The algorithm is parameterized on a formal target description, allowing fully automatic retargeting. We report on experiments conducted with a prototype implementation in a framework based on a commercial compiler.

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Runeson, J., Nyström, SO. (2003). Retargetable Graph-Coloring Register Allocation for Irregular Architectures. In: Krall, A. (eds) Software and Compilers for Embedded Systems. SCOPES 2003. Lecture Notes in Computer Science, vol 2826. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39920-9_17

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  • DOI: https://doi.org/10.1007/978-3-540-39920-9_17

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-20145-8

  • Online ISBN: 978-3-540-39920-9

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