Abstract
The main challenge in BDD-based verification is dealing with the memory explosion problem during reachability analysis. In this paper we advocate a methodology to handle this problem based on state space partitioning of functions as well as relations. We investigate the key questions of how to perform partitioning in reachability based verification and provide suitable algorithms. We also address the problem of instability of BDD-based verification by automatically picking the best configuration from different short traces of the reachability computation. Our approach drastically decreases verification time, often by orders of magnitude.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Bollig, B., Wegener, I.: Partitioned BDDs vs. other BDD models. In: IWLS (1997)
Bryant, R.: Graph-based Algorithms for Boolean Function Manipulation. IEEE Transactions on Computers C-35, 677–691 (1986)
Burch, J.R., Clarke, E.M., Long, D.E.: Symbolic Model Checking with Partitioned Transition Relations. In: Proc. of the Design Automation Conf., pp. 403–407 (1991)
Cabodi, G., Camurati, P., Quer, S.: Improved reachability analysis of large finite state machines. In: ICCAD, pp. 354–360 (1996)
Clarke, E.M., Emerson, E.A.: Design and synthesis of synchronization skeletons using branching time temporal logic. In: Logic of Programs 1981. LNCS, vol. 131, pp. 52–71. Springer, Heidelberg (1981)
Coudert, O., Berthet, C., Madre, J.C.: Verification of sequential machines based on symbolic execution. In: Proc. of the Workshop on Automatic Verification Methods for Finite State Systems (1989)
Grumberg, O., Heyman, T., Schuster, A.: Distributed symbolic model checking for μ-calculus. In: Computer Aided Verification, pp. 350–362 (2001)
Iyer, S., Sahoo, D., Stangier, C., Narayan, A., Jain, J.: Improved symbolic Verification Using Partitioning Techniques. In: Geist, D., Tronci, E. (eds.) CHARME 2003. LNCS, vol. 2860, pp. 410–424. Springer, Heidelberg (2003)
Jain, J., Bitner, J., Fussell, D.S., Abraham, J.A.: Functional partitioning for verification and related problems. In: VLSI Conference. Brown/MIT (1992)
McMillan, K.L.: Symbolic Model Checking. Kluwer Academic Publishers, Dordrecht (1993)
Narayan, A., Isles, A., Jain, J., Brayton, R., Sangiovanni-Vincentelli, A.: Reachability Analysis Using Partitioned-ROBDDs. In: ICCAD, pp. 388–393 (1997)
Narayan, A., Jain, J., Fujita, M., Sangiovanni-Vincentelli, A.: Partitioned-ROBDDs - A Compact, Canonical and Efficiently Manipulable Representation for Boolean Functions. In: ICCAD, pp. 547–554 (1996)
Pixley, C.: Introduction to a computational theory and implementation of sequential hardware equivalence (1990)
Ravi, K., Somenzi, F.: High-density reachability analysis. In: ICCAD, pp. 154–158 (1995)
Fabio Somenzi. CUDD: CU Decision Diagram Package (2001), ftp://vlsi.colorado.edu/pub
Touati, H.J., Savoj, H., Lin, B., Brayton, R.K., Sangiovanni-Vincentelli, A.L.: Implicit State Enumeration of Finite State Machines using BDD’s. In: ICCAD, pp. 130–133 (1990)
VIS. Vis verilog benchmarks (2001), http://vlsi.colorado.edu/~vis/
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2004 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Sahoo, D. et al. (2004). A Partitioning Methodology for BDD-Based Verification. In: Hu, A.J., Martin, A.K. (eds) Formal Methods in Computer-Aided Design. FMCAD 2004. Lecture Notes in Computer Science, vol 3312. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30494-4_28
Download citation
DOI: https://doi.org/10.1007/978-3-540-30494-4_28
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-23738-9
Online ISBN: 978-3-540-30494-4
eBook Packages: Springer Book Archive