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Algorithms for Enumerating Circuits in Matroids

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Algorithms and Computation (ISAAC 2003)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2906))

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Abstract

We present an incremental polynomial-time algorithm for enumerating all circuits of a matroid or, more generally, all minimal spanning sets for a flat. This result implies, in particular, that for a given infeasible system of linear equations, all its maximal feasible subsystems, as well as all minimal infeasible subsystems, can be enumerated in incremental polynomial time. We also show the NP-hardness of several related enumeration problems.

This research was supported in part by the National Science Foundation Grant IIS-0118635. The research of the first and third authors was also supported in part by the Office of Naval Research Grant N00014-92-J-1375. The second and third authors are also grateful for the partial support by DIMACS, the National Science Foundation’s Center for Discrete Mathematics and Theoretical Computer Science.

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Boros, E., Elbassioni, K., Gurvich, V., Khachiyan, L. (2003). Algorithms for Enumerating Circuits in Matroids . In: Ibaraki, T., Katoh, N., Ono, H. (eds) Algorithms and Computation. ISAAC 2003. Lecture Notes in Computer Science, vol 2906. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-24587-2_50

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  • DOI: https://doi.org/10.1007/978-3-540-24587-2_50

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-20695-8

  • Online ISBN: 978-3-540-24587-2

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