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Monolithic 3D Integration

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CHIPS 2020 VOL. 2

Part of the book series: The Frontiers Collection ((FRONTCOLL))

Abstract

As the down-sizing of transistors has arrived at fundamental and practical limits, the technology direction with the largest potential for progress is the integration of transistors in the 3rd dimension on top of each other, maintaining and using the quality of monolithic, crystalline silicon in all successive transistor layers . After decades of exploratory research, monolithic 3D integration is now ready for cost-effective, large-scale implementation of nanoelectronic systems. It offers the largest gains in transistors-per-chip, it solves the on-chip interconnect and communication gridlock and thus the energy, speed and bandwidth problems. It opens a new era of effective industry networks for the sustained growth of the nanoelectronics economy. Monolithic 3D is already being adapted for mass production, in the non-volatile memory segment-3D NAND, and it can be expected that the other segments of the semiconductor industry will follow.

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Author information

Authors and Affiliations

  1. MonolithIC 3D™ Inc., 3555 Woodford Dr., San José, CA, 95124, USA

    Zvi Or-Bach

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  1. Zvi Or-Bach
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Correspondence to Zvi Or-Bach .

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Editors and Affiliations

  1. Institute for Microelectronics, Sindelfingen, Germany

    Bernd Höfflinger

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Or-Bach, Z. (2016). Monolithic 3D Integration. In: Höfflinger, B. (eds) CHIPS 2020 VOL. 2. The Frontiers Collection. Springer, Cham. https://doi.org/10.1007/978-3-319-22093-2_3

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