Modeling Interrupts for HW/SW Co-Simulation based on a VHDL/C Coupling

Abstract

Interaction between hardware and software is often the reason for integration errors when combining both parts. Consequently, Hardware/Software Co-Simulation is required to keep with an increasing demand for an early verification of correct interaction. Using a VHDL/C Coupling, our approach of a modern testbench environment provides the possibility for Co-Simulation. At the beginning interaction was done by executing read and write operations on the software side resulting in CPU bus operations performed by a bus functional model running on a hardware simulator. To reach a higher level of interaction we extended the bus functional model to a peripheral functional model by including an interrupt handler. Accordingly, the hardware is able to react on events from the outside while sending interrupt requests to the software. In consideration of this approach most parts of the final C-software can be tested together with the hardware during an early state of the design flow.