Abstract
The Cutting edge Reconfigurable ICs for Stream Processing (CRISP) project aims to create a highly scalable and dependable reconfigurable system concept for a wide range of tomorrow’s streaming DSP applications. Within CRISP, a network-on-chip based many-core stream processor with dependability infrastructure and run-time resource management is devised, implemented, and manufactured to demonstrate a coarse-grained core-level reconfigurable system with scalable computing power, flexibility, and dependability. This chapter introduces CRISP, presents the concepts, and outlines the preliminary results of a running project.
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Acknowledgments
CRISP is a multi-disciplinary endeavor. To achieve the project objectives, highly specialized knowledge is required about applications, front-end and back-end hardware design as well as development and system software. The work reported in this chapter is a team effort and the authors would like to thank the many experts from the consortium, who worked on CRISP including Sébastien Baillou, Helmut Baur, Arjan Boeijink, Werner Brugger, Christoph Büchler, Jan de Wilde, Jeroen Flierman, Michael Günther, Matthias Hofinger, Klaas Hofstra, Henk Holdijk, Philip Hölzenspies, Thomas Janz, Erik Karstens, Ben Kemper, Roy Krikke, Pieter Maier, Rene Meerman, Rik Portengen, Jordy Potman, Johannes Schäfer, Jeroen Scholten, Hans Schurer, Lodewijk Smit, Hermen Toersche, Rene van Hees, and Mark Westmijze. Further, the authors would like to thank the European Community’s Seventh Framework Programme FP7/2007-2013 for supporting the CRISP project, and the project officers and project reviewers for their support and help in guiding the project towards its objectives.
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Ahonen, T. et al. (2011). CRISP: Cutting Edge Reconfigurable ICs for Stream Processing. In: Cardoso, J., Hübner, M. (eds) Reconfigurable Computing. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-0061-5_9
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DOI: https://doi.org/10.1007/978-1-4614-0061-5_9
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