Abstract
This paper presents a new general purpose accelerator based on the Kress ALU Array III (KrAA-III) — a novel field programmable ALU array (FPAA), which efficiently supports high performance arithmetic computations by massive pipelining. The KrAA-III and its underlying concepts will be introduced as a generalization of systolic array structural principles — illustrated by a simple real world computing example. To explain this approach for embedded accelerators the underlying novel machine paradigm, having been published earlier, is recalled as far as needed for comprehensibility.
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© 1997 Springer Science+Business Media Dordrecht
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Hartenstein, R.W., Becker, J., Herz, M., Nageldinger, U. (1997). An Embedded Accelerator for Real World Computing. In: Reis, R., Claesen, L. (eds) VLSI: Integrated Systems on Silicon. IFIP — The International Federation for Information Processing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-35311-1_18
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DOI: https://doi.org/10.1007/978-0-387-35311-1_18
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Print ISBN: 978-1-4757-6949-4
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