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Formal Verification of a Power Controller Using the Real-Time Model Checker Uppaal

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Formal Methods for Real-Time and Probabilistic Systems (ARTS 1999)

Abstract

A real-time system for power-down control in audio/video components is modeled and verified using the real-time model checker Uppaal. The system is supposed to reside in an audio/video component and control (read from and write to) links to neighbor audio/video components such as TV, VCR and remote-control. In particular, the system is responsible for the powering up and down of the component in between the arrival of data, and in order to do so in a safe way without loss of data, it is essential that no link interrupts are lost. Hence, a component system is a multitasking system with hard real-time requirements, and we present techniques for modeling time consumption in such a multitasked, prioritized system. The work has been carried out in a collaboration between Aalborg University and the audio/video company B&O. By modeling the system, 3 design errors were identified and corrected, and the following verification con- firmed the validity of the design but also revealed the necessity for an upper limit of the interrupt frequency. The resulting design has been implemented and it is going to be incorporated as part of a new product line.

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References

  1. L. Aceto, A. Bergueno, and K. G. Larsen. Model Checking via Reachability Testing for Timed Automata. In B. Steffen, editor, Proceedings of TACAS’98, volume 1384 of Lecture Notes in Computer Science, pages 263–280, 1998.

    Google Scholar 

  2. L. Aceto, P. Bouyer, A. Burgueno, and K. G. Larsen. The Limit of Testing for Timed Automata. In Proceedings of FST TCS’98, Lecture Notes in Computer Science, 1998.

    Google Scholar 

  3. R. Alur, C. Courcoubetis, and D. Dill. Model-checking for Real-Time Systems. In Proc. of Logic in Computer Science, pages 414–425. IEEE Computer Society Press, 1990.

    Google Scholar 

  4. R. Alur and D. Dill. Automata for Modelling Real-Time Systems. In Proc. of ICALP’90, volume 443 of Lecture Notes in Computer Science, 1990.

    Google Scholar 

  5. J. Bengtsson, D. Griffioen, K. Kristoffersen, K. G. Larsen, F. Larsson, P. Pettersson, and W. Yi. Verification of an Audio Protocol with Bus Collision Using Uppaal. In Proc. of CAV’96, volume 1102 of Lecture Notes in Computer Science. Springer-Verlag, 1996.

    Google Scholar 

  6. J. Bengtsson, K. G. Larsen, F. Larsson, P. Pettersson, and W. Yi. Uppaal — A Tool Suite for Symbolic and Compositional Verification of Real-Time Systems. In Proc. of the 1st Workshop on Tools and Algorithms for the Construction and Analysis of Systems, volume 1019 of Lecture Notes in Computer Science. Springer-Verlag, May 1995.

    Google Scholar 

  7. J. Bengtsson, K. G. Larsen, F. Larsson, P. Pettersson, and W. Yi. Uppaal in 1995. In Proc. of the 2nd Workshop on Tools and Algorithms for the Construction and Analysis of Systems, number 1055 in Lecture Notes in Computer Science, pages 431–434. Springer-Verlag, March 1996.

    Google Scholar 

  8. A. Bouali, A. Ressouche, and V. Roy R. de Simone. The FC2Toolset. Lecture Notes in Computer Science, 1102, 1996.

    Google Scholar 

  9. P.R. D’Argenio, J.-P. Katoen, T. Ruys, and J. Tretmans. Modelling and Verifying a Bounded Retransmission Protocol. In Proc. of COST 247, International Workshop on Applied Formal Methods in System Design, 1996.

    Google Scholar 

  10. C. Daws, A. Olivero, S. Tripakis, and S. Yovine. The tool KRONOS. In Hybrid Systems III, Verification and Control, volume 1066 of Lecture Notes in Computer Science, pages 208–219. Springer-Verlag, 1996.

    Chapter  Google Scholar 

  11. C. Ericsson, A. Wall, and W. Yi. Timed Automata as Task Models for Event-Driven Systems. In Proceedings of Nordic Workshop on Programming Theory, 1998. To appear in a special issue of Nordic Journal of Computing.

    Google Scholar 

  12. K. Havelund, K. G. Larsen, and A. Skou. Documentation of the Modeling and Verification of Bang & Olufsens’s IOP Power Down Module in Uppaal. Internal AUC document delivered to B&O. Early version of this report., September 1997.

    Google Scholar 

  13. K. Havelund, A. Skou, K. G. Larsen, and K. Lund. Formal Modeling and Analysis of an Audio/Video Protocol: An Industrial Case Study Using Uppaal. In Proc. of the 18th IEEE Real-Time Systems Symposium, pages 2–13, Dec 1997. San Francisco, California, USA.

    Google Scholar 

  14. P.-H. Ho and H. Wong-Toi. Automated Analysis of an Audio Control Protocol. In Proc. of CAV’95, volume 939 of Lecture Notes in Computer Science. Springer-Verlag, 1995.

    Google Scholar 

  15. G. Holzmann. The Design and Validation of Computer Protocols. Prentice Hall, 1991.

    Google Scholar 

  16. H.E. Jensen, K.G. Larsen, and A. Skou. Modelling and Analysis of a Collision Avoidance Protocol Using SPIN and UPPAAL. In The Second Workshop on the SPIN Verification System, volume 32 of DIMACS, Series in Discrete Mathematics and Theoretical Computer Science. American Mathematical Society, 1996.

    Google Scholar 

  17. K. G. Larsen, P. Pettersson, and W. Yi. Diagnostic Model Checking for Real-Time Systems. In Proceedings of the 4th DIMACS Workshop on Verification and Control of Hybrid Systems, 1995.

    Google Scholar 

  18. M. Lindahl, P. Pettersson, and W. Yi. Formal Design and Analysis of a Gear-Box Controller. In Bernhard Steffen, editor, Proc. of the 4th International Workshop on Tools and Algorithms for the Construction and Analysis of Systems — LNCS 1384, pages 281–297. Gulbelkian Foundation, March 1998. Lisbon, Portugal.

    Google Scholar 

  19. R. Milner. Communication and Concurrency. Prentice Hall, Englewood Cliffs, 1989.

    MATH  Google Scholar 

  20. S. Tripakis. Timed Diagnostics for Reachability Properties. In Proceedings of TACAS’99, Lecture Notes in Computer Science, 1999.

    Google Scholar 

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Havelund, K., Larsen, K.G., Skou, A. (1999). Formal Verification of a Power Controller Using the Real-Time Model Checker Uppaal . In: Katoen, JP. (eds) Formal Methods for Real-Time and Probabilistic Systems. ARTS 1999. Lecture Notes in Computer Science, vol 1601. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48778-6_17

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  • DOI: https://doi.org/10.1007/3-540-48778-6_17

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