Abstract
We propose an algorithm for LTL model checking based on the classification of the automata and on guided symbolic search. Like most current methods for LTL model checking, our algorithm starts with a tableau construction and uses a model checker for CTL with fairness constraints to prove the existence of fair paths. However, we classify the tableaux according to their structure, and use efficient decision procedures for each class. Guided search applies hints to constrain the transition relation during fixpoint computations. Each fixpoint is thus translated into a sequence of fixpoints that are often much easier to compute than the original one. Our preliminary experimental results suggest that the new algorithm for LTL is quite efficient. In fact, for properties that can be expressed in both CTL and LTL, the algorithm is competitive with the CTL model checking algorithm.
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I. Beer, S. Ben-David, and A. Landver. On-the-fly model checking of RCTL formulas. In A. J. Hu and M.Y. Vardi, editors, Tenth Conference on Computer Aided Verification (CAV’98), pages 184–194. Springer-Verlag, Berlin, 1998. LNCS 1427.
A. Biere, A. Cimatti, E. Clarke, and Y. Zhu. Symbolic model checking without BDDs. Unpublished manuscript, October 1998.
R. K. Brayton et al. VIS: A system for verification and synthesis. In T. Henzinger and R. Alur, editors, Eigth Conference on Computer Aided Verification (CAV’96), pages 428–432. Springer-Verlag, Rutgers University, 1996. LNCS 1102.
R. E. Bryant. Graph-based algorithms for boolean function manipulation. IEEE Transactions on Computers, C-35(8):677–691, August 1986.
J. R. Burch, E. M. Clarke, and D. E. Long. Representing circuits more efficiently in symbolic model checking. In Proceedings of the Design Automation Conference, pages 403–407, San Francisco, CA, June 1991.
J. R. Burch, E. M. Clarke, K. L. McMillan, D. L. Dill, and L. J. Hwang. Symbolic model checking: 1020 states and beyond. In Proceedings of the Fifth Annual Symposium on Logic in Computer Science, June 1990.
H. Cho, G. D. Hachtel, E. Macii, B. Plessier, and F. Somenzi. Algorithms for approximate FSM traversal based on state space decomposition. IEEE Transactions on Computer-Aided Design, 15(12):1465–1478, December 1996.
E. Clarke, O. Grumberg, and K. Hamaguchi. Another look at LTL model checking. In D. L. Dill, editor, Sixth Conference on Computer Aided Verification (CAV’94), pages 415–427. Springer-Verlag, Berlin, 1994. LNCS 818.
E. M. Clarke and E. A. Emerson. Design and synthesis of synchronization skeletons using branching time temporal logic. In Proceedings Workshop on Logics of Programs, pages 52–71, Berlin, 1981. Springer-Verlag. LNCS 131.
O. Coudert, C. Berthet, and J. C. Madre. Verification of sequential machines using boolean functional vectors. In L. Claesen, editor, Proceedings IFIP InternationalWorkshop on Applied Formal Methods for CorrectVLSI Design, pages 111–128, Leuven, Belgium, November 1989.
J. Desel and E. Kindler. Proving correctness of distributed algorithms using high-level Petri nets: A case study. In International Conference on Application of Concurrency to System Design, Aizu, Japan, March 1998.
E. A. Emerson. Temporal and modal logic. In van Leeuwen [33], chapter 16, pages 995–1072.
E. A. Emerson and C.-L. Lei. Efficient model checking in fragments of the propositional mu-calculus. In Proceedings of the First Annual Symposium of Logic in Computer Science, pages 267–278, June 1986.
D. Geist and I. Beer. Efficient model checking by automated ordering of transition relation partitions. In D. L. Dill, editor, Sixth Conference on Computer Aided Verification (CAV’94), pages 299–310, Berlin, 1994. Springer-Verlag. LNCS 818.
R. Gerth, D. Peled, M. Y. Vardi, and P. Wolper. Simple on-the-fly automatic verification of linear temporal logic. In Protocol Specification, Testing, and Verification, pages 3–18. Chapman & Hall, 1995.
R. H. Hardin, R. P. Kurshan, S. K. Shukla, and M. Y. Vardi. A new heuristic for bad cycle detection using BDDs. In O. Grumberg, editor, Ninth Conference on Computer Aided Verification (CAV’97), pages 268–278. Springer-Verlag, Berlin, 1997. LNCS 1254.
T. A. Henzinger, O. Kupferman, and S. Qadeer. From pre-historic to post-modern symbolic model checking. In A. J. Hu and M.Y. Vardi, editors, Tenth Conference on Computer Aided Verification (CAV’98), pages 195–206. Springer-Verlag, Berlin, 1998. LNCS 1427.
H. Iwashita and T. Nakata. Forward model checking techniques oriented to buggy designs. In Proceedings of the International Conference on Computer-Aided Design, pages 400–405, San Jose, CA, November 1997.
H. Iwashita, T. Nakata, and F. Hirose. CTL model checking based on forward state traversal. In Proceedings of the International Conference on Computer-Aided Design, pages 82–87, San Jose, CA, November 1996.
O. Kupferman and M. Y. Vardi. Freedom, weakness, and determinism: From linear-time to branching-time. In Proc. 13th IEEE Symposium on Logic in Computer Science, June 1998.
O. Kupferman and M.Y. Vardi. Relating linear and branching model checking. In IFIPWorking Conference on Programming Concepts and Methods,NewYork, June 1998. Chapman & Hall.
R. P. Kurshan. Computer-Aided Verification of Coordinating Processes. Princeton University Press, Princeton, NJ, 1994.
W. Lee, A. Pardo, J. Jang, G. Hachtel, and F. Somenzi. Tearing based abstraction for CTL model checking. In Proceedings of the International Conference on Computer-Aided Design, pages 76–81, San Jose, CA, November 1996.
O. Lichtenstein and A. Pnueli. Checking that finite state concurrent programs satisfy their linear specification. In Proceedings of the Twelfth Annual ACM Symposium on Principles of Programming Languages, New Orleans, January 1985.
D. E. Long. Model Checking, Abstraction, and Compositional Verification. PhD thesis, Carnegie-Mellon University, July 1993.
K. L. McMillan. Symbolic Model Checking. Kluwer Academic Publishers, Boston, MA, 1994.
C. Meinel and T. Theobald. Algorithms and Data Structures in VLSI Design. Springer, Berlin, 1998.
I.-H. Moon, J.-Y. Jang, G. D. Hachtel, F. Somenzi, C. Pixley, and J. Yuan. Approximate reachability don’t cares for CTL model checking. In Proceedings of the International Conference on Computer-Aided Design, pages 351–358, San Jose, CA, November 1998.
D. E. Muller, A. Saoudi, and P. E. Schupp.Weak alternating automata give a simple explanation of why most temporal and dynamic logics are decidable in exponential time. In Proceedings of the 3rd IEEE Symposium on Logic in Computer Science, pages 422–427, Edinburgh, UK, July 1988.
A. Pardo and G. D. Hachtel. Incremental CTL model checking using BDD subsetting. In Proceedings of the Design Automation Conference, pages 457–462, San Francisco, CA, June 1998.
R. K. Ranjan, A. Aziz, R. K. Brayton, B. F. Plessier, and C. Pixley. Efficient BDD algorithms for FSM synthesis and verification. Presented at IWLS95, Lake Tahoe, CA., May 1995.
K. Ravi. Adaptive Techniques to Improve State Space Search in Formal Verification. PhD thesis, University of Colorado, Department of Electrical and Computer Engineering, 1999.
J. van Leeuwen, editor. Handbook of Theoretical Computer Science. The MIT Press/Elsevier, Amsterdam, 1990.
M. Y. Vardi and P. Wolper. An automata-theoretic approach to automatic program verification. In Proceedings of the First Symposium on Logic in Computer Science, pages 322–331, Cambridge, UK, June 1986.
C. H. Yang and D. L. Dill. Validation with guided search of the state space. In Proceedings of the Design Automation Conference, pages 599–604, San Francisco, CA, June 1998.
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Bloem, R., Ravi, K., Somenzi, F. (1999). Efficient Decision Procedures for Model Checking of Linear Time Logic Properties. In: Halbwachs, N., Peled, D. (eds) Computer Aided Verification. CAV 1999. Lecture Notes in Computer Science, vol 1633. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48683-6_21
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