Abstract
Dynamic conditional branch prediction is an indispensable technique for increasing performance in modern processors. However, currently proposed schemes suffer from loss of accuracy when applied to speculative multithreading CMP architectures. In this paper, we quantitatively investigate this problem and present a hardware scheme to improve the prediction accuracy. Evaluation results show that an improvement of 1.4% in average can be achieved in SPECint95.
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References
J. Smith: A Study of Branch Prediction Strategies. Proc. 8th Annual Int’l Symp. Computer Architecture, 135–148, 1981.
T. Yeh, Y. Patt: A Comparison of Dynamic Branch Predictors that use Two Levels of Branch History. Proc. 20th Annual Int’l Symp. Computer Architecture, 257–266, 1993.
S. McFarling: Combining Branch Predictors. Technical Report TN-36, Digital Western Research Laboratory, 1993.
P. Chang, E. Hao, T. Yeh, Y. Patt: Branch Classification: A New Mechanism for Improving Branch Predictor Performance. Proc. 27th Annual Int’l Symp. Microarchitecture, 22–31, 1994.
R. Kessler: The Alpha 21264 Microprocessor. IEEE Micro, March-April, 24–36, 1999.
K. Olukotun, B. Nayfeh, L. Hammond, K. Wilson, K. Chang: The Case for a Single Chip Multiprocessor. Proc. 7th Int’l Symp. Architectural Support for Programming Languages and Operating Systems, 2–11, 1996.
L. Hammond, M. Willey, K. Olukotun: Data Speculation Support for a Chip Multiprocessor. Proc. 8th Int’l Conf. Architectural Support for Programming Languages and Operating Systems, 48–69, 1998.
G. S. Sohi, S. reach, T. N. Vijaykumar: Multiscalar Processors. Proc. 22nd Annual Int’l Symp. Computer Architecture, 414–425, 1995.
V. Krishnan, J. Torellas: A Chip-Multiprocessor Architecture with Speculative Multithreading. IEEE Transactions on Computers, Vol. 48, No. 9. 866–880, 1999.
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© 2001 Springer-Verlag Berlin Heidelberg
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Iwama, C., Barli, N.D., Sakai, S., Tanaka, H. (2001). Improving Conditional Branch Prediction on Speculative Multithreading Architectures. In: Sakellariou, R., Gurd, J., Freeman, L., Keane, J. (eds) Euro-Par 2001 Parallel Processing. Euro-Par 2001. Lecture Notes in Computer Science, vol 2150. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44681-8_60
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DOI: https://doi.org/10.1007/3-540-44681-8_60
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