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Formal Verification of IA-64 Division Algorithms

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Theorem Proving in Higher Order Logics (TPHOLs 2000)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1869))

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Abstract

The IA-64 architecture defers floating point and integer division to software. To ensure correctness and maximum efficiency, Intel provides a number of recommended algorithms which can be called as subroutines or inlined by compilers and assembly language programmers. All these algorithms have been subjected to formal verification using the HOL Light theorem prover. As well as improving our level of confidence in the algorithms, the formal verification process has led to a better understanding of the underlying theory, allowing some significant efficiency improvements.

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References

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Author information

Authors and Affiliations

  1. Intel Corporation, EY2-03, 5200 NE Elam Young Parkway, Hillsboro, OR, 97124, USA

    John Harrison

Authors
  1. John Harrison
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Editor information

Editors and Affiliations

  1. Intel Corporation, 5200 NE Elam Young Parkway, Hillsboro, OR, 97124, USA

    Mark Aagaard  & John Harrison  & 

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© 2000 Springer-Verlag Berlin Heidelberg

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Harrison, J. (2000). Formal Verification of IA-64 Division Algorithms. In: Aagaard, M., Harrison, J. (eds) Theorem Proving in Higher Order Logics. TPHOLs 2000. Lecture Notes in Computer Science, vol 1869. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44659-1_15

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  • DOI: https://doi.org/10.1007/3-540-44659-1_15

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-67863-2

  • Online ISBN: 978-3-540-44659-0

  • eBook Packages: Springer Book Archive

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