Abstract
This paper describes two implementations of a Data Encryption Standard (DES) encryptor/decryptor that operate at data rates up to 12 Gbps. The 12 Gpbs number is faster than any previously published design. In these DES implementations, the key can be changed and the core switched from encryption to decryption mode on a cycle-by-cycle basis with no dead cycles. The designs were synthesized from Verilog HDL and implemented in Xilinx XCV300 and XCV300E devices. This paper describes the optimizations used and the coding conventions required to direct the synthesis tools to map the design to achieve a high-speed implementation. No physical constraints were given to the tools.
Chapter PDF
Similar content being viewed by others
Keywords
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
References
ANSI, “Triple Data Encryption Algorithm Modes of Operation”, American National Standards Institute X9.52-1998, American Bankers Association, Washington DC, July 29, 1998
FIPS, “Data Encryption Standard”, Federal Information Processing Standards Publication 46-2, 1993 December 30.
Kwan, M., “Bitslice DES”, http://www.darkside.com.au/bitslice/ nonstd.c
5. Patterson, C., “High Performance DES Encryption in Virtex FPGAs using Jbits”, FCCM 2000, IEEE Computer Society, 2000.
Patterson, C., private communication, 2000.
Schneier, B., Applied Cryptography, John Wiley and Sons, 1996.
Wilcox, D.C., et al., “A DES ASIC suitable for network encryption at 10Gbps and beyond”, First International Workshop on Cryptographic Hardware and Embedded Systems, 1999.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2000 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Trimberger, S., Pang, R., Singh, A. (2000). A 12 Gbps DES Encryptor/Decryptor Core in an FPGA. In: Koç, Ç.K., Paar, C. (eds) Cryptographic Hardware and Embedded Systems — CHES 2000. CHES 2000. Lecture Notes in Computer Science, vol 1965. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44499-8_11
Download citation
DOI: https://doi.org/10.1007/3-540-44499-8_11
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-41455-1
Online ISBN: 978-3-540-44499-2
eBook Packages: Springer Book Archive