Skip to main content

Conflict Detection and Validation Strategies for Software Transactional Memory

  • Conference paper
Distributed Computing (DISC 2006)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4167))

Included in the following conference series:

Abstract

In a software transactional memory (STM) system, conflict detection is the problem of determining when two transactions cannot both safely commit. Validation is the related problem of ensuring that a transaction never views inconsistent data, which might potentially cause a doomed transaction to exhibit irreversible, externally visible side effects. Existing mechanisms for conflict detection vary greatly in their degree of speculation and their relative treatment of read-write and write-write conflicts. Validation, for its part, appears to be a dominant factor—perhaps the dominant factor—in the cost of complex transactions.

We present the most comprehensive study to date of conflict detection strategies, characterizing the tradeoffs among them and identifying the ones that perform the best for various types of workload. In the process we introduce a lightweight heuristic mechanism—the global commit counter—that can greatly reduce the cost of validation and of single-threaded execution. The heuristic also allows us to experiment with mixed invalidation, a more opportunistic interleaving of reading and writing transactions. Experimental results on a 16-processor SunFire machine running our RSTM system indicate that the choice of conflict detection strategy can have a dramatic impact on performance, and that the best choice is workload dependent. In workloads whose transactions rarely conflict, the commit counter does little to help (and can even hurt) performance. For less scalable applications, however—those in which STM performance has traditionally been most problematic—it can improve transaction throughput many fold.

This work was supported in part by NSF grants CCR-0204344 and CNS-0411127, by financial and equipment grants from Sun Microsystems Labs, and by financial support from Intel.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Ananian, C.S., Asanovic, K., Kuszmaul, B.C., Leiserson, C.E., Lie, S.: Unbounded Transactional Memory. In: Proc. of the 11th Intl. Symp. on High-Performance Computer Architecture, pp. 316–327 (February 2005)

    Google Scholar 

  2. Fraser, K.: Practical Lock-Freedom. Ph.D. Dissertation, UCAM-CL-TR-579. Cambridge Univ. Computer Laboratory (February 2004)

    Google Scholar 

  3. Fraser, K., Harris, T.: Concurrent Programming without Locks (submitted for publication) (2004)

    Google Scholar 

  4. Guerraoui, R., Herlihy, M., Kapalka, M., Pochon, B.: Robust Contention Management in Software Transactional Memory. In: Proc. of the Workshop on Synchronization and Concurrency in Object-Oriented Languages, San Diego, CA (October 2005); Held in conjunction with OOPSLA 2005

    Google Scholar 

  5. Guerraoui, R., Herlihy, M.P., Pochon, B.: Polymorphic contention management. In: Fraigniaud, P. (ed.) DISC 2005. LNCS, vol. 3724, pp. 303–323. Springer, Heidelberg (2005)

    Chapter  Google Scholar 

  6. Guerraoui, R., Herlihy, M., Pochon, B.: Toward a Theory of Transactional Contention Managers. In: Proc. of the 24th Annual ACM Symp. on Principles of Distributed Computing, Las Vegas, NV (July 2005)

    Google Scholar 

  7. Hammond, L., Wong, V., Chen, M., Carlstrom, B.D., Davis, J.D., Hertzberg, B., Prabju, M.K., Wijaya, H., Kozyrakis, C., Olukotun, K.: Transactional Memory Coherence and Consistency. In: Proc. of the 31st Annual Intl. Symp. on Computer Architecture, p. 102. IEEE Computer Society Press, Los Alamitos (2004)

    Chapter  Google Scholar 

  8. Harris, T., Fraser, K.: Language Support for Lightweight Transactions. In: Proc. of the 18th Annual ACM Conf. on Object-Oriented Programming, Systems, Languages, and Applications, pp. 388–402 (October 2003)

    Google Scholar 

  9. Harris, T., Marlow, S., Peyton Jones, S., Herlihy, M.: Composable Memory Transactions. In: Proc. of the 10th ACM SIGPLAN 2006 Symp. on Principles and Practice of Parallel Programming, pp. 48–60 (June 2005)

    Google Scholar 

  10. Harris, T., Plesko, M., Shinar, A., Tarditi, D.: Optimizing Memory Transactions. In: Proc. of the 2006 ACM SIGPLAN Conf. on Programming Language Design and Implementation (June 2006)

    Google Scholar 

  11. Herlihy, M.P., Luchangco, V., Moir, M., Scherer III, W.N.: Software Transactional Memory for Dynamic-sized Data Structures. In: Proc. of the 22nd Annual ACM Symp. on Principles of Distributed Computing (July 2003)

    Google Scholar 

  12. Herlihy, M.P., Moss, J.E.B.: Transactional Memory: Architectural Support for Lock-Free Data Structures. In: Proc. of the 20th Annual Intl. Symp. on Computer Architecture, pp. 289–300. ACM Press, New York (1993)

    Chapter  Google Scholar 

  13. Herlihy, M.P., Wing, J.M.: Linearizability: a Correctness Condition for Concurrent Objects. ACM Trans. on Programming Languages and Systems 12(3), 463–492 (1990)

    Article  Google Scholar 

  14. Hudson, R.L., Saha, B., Adl-Tabatabai, A.-R., Hertzberg, B.: A Scalable Transactional Memory Allocator. In: Proc. of the 2006 Intl. Symp. on Memory Management (June 2006)

    Google Scholar 

  15. Lev, Y., Moir, M.: Fast Read Sharing Mechanism for Software Transactional Memory (POSTER). In: Proc. of the 24th Annual ACM Symp. on Principles of Distributed Computing, St. Johns, NL, Canada (July 2004)

    Google Scholar 

  16. Marathe, V.J., Scherer III, W.N., Scott, M.L.: Design Tradeoffs in Modern Software Transactional Memory Systems. In: Proc. of the 7th Workshop on Languages, Compilers, and Run-time Support for Scalable Systems (October 2004)

    Google Scholar 

  17. Marathe, V.J., Scherer III, W.N., Scott, M.L.: Adaptive Software Transactional Memory. In: Proc. of the 19th Intl. Symp. on Distributed Computing, Cracow, Poland (September 2005)

    Google Scholar 

  18. Marathe, V.J., Scott, M.L.: A Qualitative Survey of Modern Software Transactional Memory Systems. Technical Report TR 839, Dept. of Computer Science, Univ. of Rochester (June 2004)

    Google Scholar 

  19. Marathe, V.J., Spear, M.F., Heriot, C., Acharya, A., Eisenstat, D., Scherer III, W.N., Scott, M.L.: Lowering the Overhead of Nonblocking Software Transactional Memory In: Proc. of the 1st ACM SIGPLAN Workshop on Languages, Compilers, and Hardware Support for Transactional Computing (June 2006); Earlier, extended version available as TR 893, Dept. of Computer Science, Univ. of Rochester (March 2006)

    Google Scholar 

  20. Moore, K.E., Bobba, J., Moravan, M.J., Hill, M.D., Wood, D.A.: LogTM: Log-based Transactional Memory. In: Proc. of the 12th Intl. Symp. on High-Performance Computer Architecture (February 2006)

    Google Scholar 

  21. Saha, B., Adl-Tabatabai, A.-R., Hudson, R.L., Minh, C.C., Hertzberg, B.: McRT-STM: A High Performance Software Transactional Memory System For A Multi-Core Runtime. In: Proc. of the 11th ACM SIGPLAN 2006 Symp. on Principles and Practice of Parallel Programming, pp. 187–197 (March 2006)

    Google Scholar 

  22. Scherer III, W.N., Scott, M.L.: Contention Management in Dynamic Software Transactional Memory. In: Proc. of the ACM PODC Workshop on Concurrency and Synchronization in Java Programs, St. John’s, NL, Canada (July 2004)

    Google Scholar 

  23. Scherer III, W.N., Scott, M.L.: Advanced Contention Management for Dynamic Software Transactional Memory. In: Proc. of the 24th Annual ACM Symp. on Principles of Distributed Computing, Las Vegas, NV (July 2005)

    Google Scholar 

  24. Scherer III, W.N., Scott, M.L.: Randomization in STM Contention Management (POSTER). In: Proc. of the 24th Annual ACM Symp. on Principles of Distributed Computing, Las Vegas, NV (July 2005)

    Google Scholar 

  25. Scott, M.L.: Sequential Specification of Transactional Memory Semantics. In: Proc. of the 1st ACM SIGPLAN Workshop on Languages, Compilers, and Hardware Support for Transactional Computing (June 2006)

    Google Scholar 

  26. Shavit, N., Touitou, D.: Software Transactional Memory. In: Proc. of the 14th Annual ACM Symp. on Principles of Distributed Computing, pp. 204–213 (August 1995)

    Google Scholar 

  27. Shriraman, A., Marathe, V.J., Dwarkadas, S., Scott, M.L., Eisenstat, D., Heriot, C., Scherer III, W.N., Spear, M.F.: Hardware Acceleration of Software Transactional Memory. In: Proc. of the 1st ACM SIGPLAN Workshop on Languages, Compilers, and Hardware Support for Transactional Computing (June 2006); Earlier, extended version available as TR 887, Dept. of Computer Science, Univ. of Rochester (March 2006)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2006 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Spear, M.F., Marathe, V.J., Scherer, W.N., Scott, M.L. (2006). Conflict Detection and Validation Strategies for Software Transactional Memory. In: Dolev, S. (eds) Distributed Computing. DISC 2006. Lecture Notes in Computer Science, vol 4167. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11864219_13

Download citation

  • DOI: https://doi.org/10.1007/11864219_13

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-44624-8

  • Online ISBN: 978-3-540-44627-9

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics