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A 31–45.5 GHz injection-locked frequency divider in 90-nm CMOS technology

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Abstract

We present a 31–45.5 GHz injection-locked frequency divider (ILFD) implemented in a standard 90-nm CMOS process. To reduce parasitic capacitance and increase the operating frequency, an NMOS-only cross-coupled pair is adopted to provide negative resistance. Acting as an adjustable resistor, an NMOS transistor with a tunable gate bias voltage is connected to the differential output terminals for locking range extension. Measurements show that the designed ILFD can be fully functional in a wide locking range and provides a good figure-of-merit. Under a 1 V tunable bias voltage, the self-resonant frequency of the divider is 19.11 GHz and the maximum locking range is 37.7% at 38.5 GHz with an input power of 0 dBm. The power consumption is 2.88 mW under a supply voltage of 1.2 V. The size of the chip including the pads is 0.62 mm×0.42 mm.

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Correspondence to Zhi-gong Wang.

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Project supported by the National Basic Research Program (973) of China (No. 2010CB327404), the National High-Tech R&D Program (863) of China (No. 2011AA10305), and the National Natural Science Foundation of China (Nos. 60901012 and 61106024)

ORCID: Fa-en LIU, http://orcid.org/0000-0003-1656-7936; Zhigong WANG, http://orcid.org/0000-0002-9203-4683

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Liu, Fe., Wang, Zg., Li, Zq. et al. A 31–45.5 GHz injection-locked frequency divider in 90-nm CMOS technology. J. Zhejiang Univ. - Sci. C 15, 1183–1189 (2014). https://doi.org/10.1631/jzus.C1400080

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  • DOI: https://doi.org/10.1631/jzus.C1400080

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