Abstract
The manuscript presents the construction of a diagonally structured Parity check matrix using lower and upper (LU) decomposition for regular Quasi Cyclic-Low Density Parity Check Codes (QC-LDPC) with girth 12. This diagonally structured parity check matrix reduces the sparsity characteristics of QC-LDPC codes. The regular Quasi Cyclic-LDPC code has been constructed using circulant shifting and randomization method in which uniform distribution of non-zero elements, XOR operation, and pairing of row and column has been done. A Simplified Log Domain Sum-Product Algorithm (SLDSPA) is used for the decoding of the constructed code. To reduce the CPU run time of the constructed code, a column-wise loop optimization technique is applied. The frame error rate and CPU run time is calculated for different code lengths such as code1 (816, 408), code2 (1008, 504), code3 (1032, 516), code4 (1944, 972), code5 (672, 336) and code6 (504, 252). The construction of regular QC-LDPC codes on half code rate is obtained for the weight of each row is 6 and each column is given by 3. The results showing that the constructed code is better performing in terms of Low FER (10−1 to 10−7), Low SNR (0 to 3.5 dB) and Less CPU run time in milliseconds.
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Mathur, J.P.S., Pandey, A. FER Performance Analysis and Optimization of Diagonal Structure Based QC-LDPC Codes with Girth 12 Using LU Decomposition. J. Electr. Eng. Technol. 15, 1405–1412 (2020). https://doi.org/10.1007/s42835-020-00394-w
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DOI: https://doi.org/10.1007/s42835-020-00394-w