Economic pulse electrodeposition for flexible CuInSe2 solar cells

Electrodeposition is one of the leading non-vacuum techniques for the fabrication of CuInSe2 (CIS)-based solar cells. In the present work, pulse electrodeposition, an advanced technique, is utilized effectively for CIS absorber preparation devoid of any additives/complexing agents. An economic pulse electrodeposition is employed for the deposition of Cu/In stack followed by selenization to fabricate CIS absorbers on flexible and glass substrates. The approach uses a two-electrode system suitable for large area deposition and utilizes the fundamentals of pulse electrodeposition with appropriate optimization of parameters to obtain smooth Cu/In precursors. The selenized CIS absorbers are of 1 µm thick while possessing copper-poor composition (Cu/In ≈ 0.9) and tetragonal chalcopyrite phase. The fabricated devices have exhibited a power conversion efficiency of 5.2%. The technique can be further improved to obtain low-cost CIS solar cells which are suitable for various small-scale energy applications.


Introduction
Flexible photovoltaics (PV) is going to play huge role in meeting the energy demands, since the flexibility aspect offers their application in wide range from small-scale energy requirements to large scale energy production. Thin films solar cells are the most appropriate candidates for such applications which offer lightweight and flexibility. I-III-VI 2 based copper indium selenide (CIS) and copper indium gallium selenide (CIGS) semiconductors are the leading materials technologies among thin films solar cells owing to their superior optical, electronic properties and stability [1]. Recently, CIGS solar cells have achieved an efficiency of 23.35% from a sputtering-selenization route [2], indicating their progress towards reaching the theoretical limit. However, it is important to look for low-cost methods to explore these solar cells for flexible PV, specifically when the targeted applications are small-scale energy. In the quest for low-cost methods, solution-based electrodeposition is one of the methods explored extensively for the fabrication of CIGS absorbers and has witnessed efficiencies up to 17% [3][4][5]. Electrodeposition is a versatile technique capable of uniform large-scale deposition alongside roll-to-roll manufacturing on different shapes and sizes of substrates with high throughput, efficient materials utilization and high deposition rate [6,7]. Another important advantage of electrodeposition technique is its ability to clean the flexible substrates through anodization/electropolishing. Furthermore, the advanced feature of pulse plating in electrodeposition process makes it even more unique, since the pulse deposition allows better control over the features of the electrodeposit [8,9]. For instance, pulse electrodeposition (PED) with its effective utilization of parameters is suitable for controlling composition of elements in a multi-component system, improves grain structure, aids in better dispersion in composite materials, etc. while avoiding additional processing steps [10][11][12]. In case of Cu-In-Ga-Se, a quarternary system, the PED approach is more advantageous, since it improves elemental compositional control which is essential for CIGS due to its complex stoichiometry [13]. Although there have been reports on the use of PED for CIS/CIGS absorbers preparation, not many have showed the fabrication of solar cells from such an approach and their performance. For instance, PED technique is used to eliminate secondary copper selenide phases [14], to improve the morphology [15], to understand the growth mechanism of CIGS [16], to obtain control over In deposition [17], for nanostructuring of CIGS to improve its photoelectrochemical performance [18,19], etc. However, Bi et al. have used the PED to deposit stacks of Cu/In/Ga and obtained efficiencies up to 11% with a three stage selenization approach [20,21]. Various complexing agents and additives like sulfamic acid, glucose, and triethanolamine are used for pulse electrodeposition of Cu, In and Ga.
The present study explores the use of pulse electrodeposition technique for the deposition of Cu/In stack layers using a two-electrode system devoid of any additives on flexible Mo foil and rigid Mo/glass substrates. Uniform distributed layers of Cu and In are obtained by PED which upon further selenization formed CIS. The fabricated CIS solar cells (Mo/CIS/CdS/ZnO/AZO) have exhibited a power conversion efficiency of 5.2% and further improvement is underway.

Experimental
Pulse electrodeposition (PED) approach was used to deposit Cu/In precursor stack. Deposition of Cu was performed from a solution containing CuCl 2 with pH around 1 adjusted using HCl alongside a supporting electrolyte (LiCl). In deposition was carried out in InCl 3 + LiCl electrolyte. Pulse power supply from Dynatronix was used to perform the electrodeposition. The PED setup comprised of Mo foil and Mo/glass as working electrodes with graphite as anode and avoids the third reference electrode. The substrates were cleaned as per the procedure detailed in our previous reports [17,19]. Deposition of copper was performed using a voltage of − 1.5 V for 17 min followed by the deposition of In at − 2.0 V for 20 min. Both the depositions were performed using PED with a duty cycle of 50% and at room temperature. The depositions with the same pulse conditions were performed both on Mo foil and Mo/glass substrates. The Cu/ In stack was further selenized in a two-zone tubular furnace, wherein Se source was kept in one zone in a temperature range of 230-260 ℃ while the electrodeposited precursor was in a different zone. Selenization was performed for 30 min at 550 ℃ in inert (Ar) atmosphere with a tube pressure of 2 mbar.
Pulse electrodeposited and selenized CIS absorbers were characterized using FESEM for surface and cross-sectional morphology, and EDS for compositional studies. Stylus profilometry was used to determine the thickness of individual Cu, In layers and CIS absorber. XRD and Raman studies were performed to identify the presence of different phases. Complete details such as make and model of equipment are same as used previously [22]. Further, solar cells were fabricated in Mo/CIS/CdS/ZnO/AZO configuration using chemical bath deposited CdS and pulsed DC sputtered i-ZnO and AZO layers. The devices were tested under dark and simulated light using AM 1.5G lens and the external quantum efficiency (EQE) was measured.

Results and discussion
Surface morphology of pulse electrodeposited Cu layer is shown in Fig. 1a and that of Cu/In stack is shown in Fig. 1b. The morphology of Cu shows uniform deposition with compact and conformal coverage over Mo foil substrate. Such coverage is essential to allow the uniform deposition In in the second step. In electrodeposition of CIS or CIGS, it is well-known that the deposition of Cu on Mo facilitates the deposition of In as In does not get reduced onto Mo directly at ambient temperatures [23], unless extreme conditions like high current densities and low temperatures (− 5 ℃) are employed [24]. Therefore, a smooth and conformally covered Cu layer on Mo is necessary, which is achieved in the present case by pulse electrodeposition (PED). Figure 1b shows the morphology of Cu/In stack and it can be seen that the top In layer is uniformly distributed on copper layer with compact and large grains. It is known that In generally has a tendency to get deposited in an islandic structure leading to rough surface morphology. In electrodeposition, Cu and In are expected to form in dendritic or islandic type morphologies when the deposition is performed using direct current electrodeposition [21]. Therefore, researchers often adopt the use of complexing agents and/or additives to improve the grain structure and uniformity of the deposition. Alternatively, PED, an advanced form of electrodeposition, by virtue of its ability to deposit and relax periodically during electrodeposition is known to improve the uniformity of morphology while reducing the surface roughness. In few cases, a PED approach is used along with the aid of complexing agents or additives to obtain a uniform morphology [21,25]. In this study, however, PED approach with optimal set of pulse parameters is used to obtain a better control over the morphology of Cu and In depositions. The high magnification image of the red circled portion of Fig. 1b is shown in inset which unveils a uniform deposition of copper followed by coverage of In large grains. Figure 1c shows the surface morphology of selenized CIS absorbers which shows a compact grain structure affirming the complete reaction of layers during selenization to form CIS. The high magnification image (inset of Fig. 1c) of CIGS absorbers shows well-connected compact agglomerated grains of size ≈ 2-3 µm, which are desirable for effective absorption of light and separation of charge carriers. The composition of Cu/In stack shown in Table 1 reveals a copper poor composition prior to selenization. The thickness values of Cu and In layers, obtained from stylus profilometry, are 230 and 250 nm, respectively, with an average roughness of < 30 nm. These values indicate the two major advantages of PED, namely, the better deposition rate leading to increased thickness of stack layers and the reduced roughness associated with them. The composition of selenized CIS absorbers shown in Table 1 appears to exhibit same Cu/In ratio as that of precursor indicating an overall copper-poor composition. It is pertinent to note that, during selenization, the only major change that occurs to the precursor stack is the incorporation of Se into the films to form CIS. The relative Se content in the absorber thus changes the relative contents of Cu and In but their ratio hardly gets affected. The thickness of CIS absorber is around 1 µm with an average roughness being around 200 nm. From the surface morphologies of Cu/In stack and selenized CIS absorbers and their roughness values, it is observed that the precursor stack deposited by PED process appears to be smoother compared to the selenized absorbers which although consists of well-connected compact grains but possess surface roughness. A further process optimization of selenization is needed to obtain uniform large grained absorbers and is being pursued.
The cross-sectional morphology of selenized CIS, shown in Fig. 2, reveals a compact well-connected grain structure through the bulk of the absorber. The thickness of the films observed to be around 1 µm. Such compact morphology helps in effective separation of charge carriers; however, further efforts are needed to increase the film thickness and reduce the surface roughness. A point to be noted here that Fig. 2 is the representative equivalent sample grown on rigid substrate. Figure 3a shows the XRD pattern of selenized CIS absorbers. As can be seen, the absorber crystallizes with (112), (220), (312) and (400) orientations indicating the polycrystalline behavior with (112) being the dominant one, which pertains to tetragonal chalcopyrite structure of CIS (JCPDS file: 40-1487) [26,27]. Furthermore, the Raman spectrum of PED selenized CIS, shown in Fig. 3b, reveals strong peak to A 1 mode at 173 cm −1 with a B 2 /E mode being present at 215 cm −1 [28,29]. XRD and Raman analyses indicate the formation of chalcopyrite CIS absorber.
The PED selenized CIS absorbers are further used to fabricate solar cells in substrate configuration by chemical bath deposition of CdS, which forms the heterojunction with CIS to separate charge carriers and pulsed DC sputtering of ZnO and AZO layers, which act as transparent window layers and AZO is also the top contact as no additional metallic grids are used. The dark and light J-V measurements of devices are recorded under solar simulator as shown in Fig. 4a. The dark curve indicates the diode behavior of CIS solar cell while illuminated J-V curve confirms their photoactivity. A power conversion efficiency of 5.2% is observed with a V OC of 440 mV, J SC of 33.5 mA/cm 2 and FF of 0.38. The 5.2% efficiency of CIS solar cells could be the best value obtained for a pulse electrodeposited CIS without using any complexing agent or additive or post deposition treatment like KCN or alkali halides, etc. while adopting a conventional selenization process. Although well-connected compact grain morphology and desirable composition may have yielded 5.2% efficiency, the value still needs a significant improvement. From the device parameters, it can be observed that the V OC is low, although the absorbers possess a near-stoichiometric composition, which may be due to the possible presence of bulk defects and the rough surface of the absorber which may be causing issues at the CIS/CdS interface of the device. In addition, particularly the FF of the devices is considerably low and may also be due to the rough grain morphology and smaller grain size. External quantum efficiency (EQE) curve is recorded for CIS solar cells as shown in Fig. 4b which unveils an EQE of 75% in the visible range and drops gradually towards the longer wavelength region. This could be due to the possible presence of defects in the bulk of the absorber leading to recombination of carriers. The bandgap of CIS absorbers is determined to be around 1 eV as inferred from EQE analysis (inset of Fig. 4b). This value matches well with the theoretical bandgap of CIS and agrees with previous reports [10,26]. Further efforts are being pursued to increase the thickness and reduce the surface roughness of the absorber while incorporation of Ga is also underway to improve the performance of the solar cells.

Conclusions
Pulse electrodeposition (PED) approach is used to deposit the stack of Cu/In to obtain smooth layers with conformal spread of Cu and In. The PED/PED deposited Cu/In stack is selenized using a two-zone furnace to form polycrystalline CIS absorbers with copper poor composition. The absorbers exhibit compact grain morphology in the surface and bulk of the semiconductor. The PED selenized CIS solar cells have yielded a power conversion efficiency of 5.2% which proves the efficacy of the process towards low cost solar cells. Furthermore, improvement in absorber layer and incorporation of Ga are being carried out.