Effect of dummy vias on interconnect temperature variation

The number of the dummy via can significantly affect the interconnect average temperature. This paper explores the modeling of the interconnect average temperature in the presence of multiple dummy vias. The proposed model incorporates the multi-via effect into the effective thermal conductivity of the interlayer dielectric (ILD) to obtain accurate results. Using different ILDs, the multi-via effect is analyzed and discussed. Also, the extended applications of the multi-via effect are presented in this paper to obtain the minimum interconnect average temperature increase with a given via separation or number. This study suggests that the multi-via effect should be accounted for in integrated circuits design to optimize the performance and design accuracy of integrated circuits.

As feature sizes have decreased, a continuous increase in integration density has resulted in higher overall chip temperature, which makes power dissipation and thermal issues a major impediment in the design of ultra large scale integrated circuits (ULSI) [1][2][3]. Research has shown that on-chip global interconnect self-heating contributes about 34% of the total chip power dissipation in an Intel microprocessor with 130-nm features [4]. Moreover, because of the reduction of the distance between the substrate and the top-most metal layers [5], the substrate temperature variations have an increased effect on interconnect temperature profile. In high-performance integrated circuits (ICs), the peak chip temperature can reach 210°C and the thermal gradients can rise above 50°C when in the GHz frequency regime [6,7]. The temperature distribution can strongly affect the interconnect resistance, and, consequently, the signal integrity of circuits can be degraded.
Furthermore, low-k materials are generally used to reduce the effect on interconnect time delay, crosstalk and dynamic power consumption [8,9]. However, because of the poor thermal conductivity of such materials, most of the *Corresponding author (email: fire5water@hotmail.com) Joule heating produced by the interconnects on every level cannot be transmitted to the heat sink. Therefore it accumulates which leads to a larger interconnect temperature rise. However, vias can effectively reduce interconnect temperature increase. Hence the interconnect temperature will not be not as high would be estimated or the previous circumstance [10][11][12][13]. Because of the reasonable thermal conductivity of vias, dummy vias can be introduced to reduce the interconnect temperature in IC design. A dummy via is a kind of via which that used to conduct heat but is not electrically connected [12][13][14][15]. The interconnect temperature profile can be strongly affected by the presence of dummy vias. Over-estimation of the interconnect temperature can lead to design failure or unnecessarily conservative design. Therefore, an accurate prediction of interconnect temperature is a necessary precondition for interconnect characterization.

Interconnect temperature model with multiple dummy vias
For our model, we assumed that an interconnect exchanges heat with the environment only through the substrate [5]. In addition, as shown in Figure 1, for a global interconnect, the temperature in the length direction varies more quickly than in the directions of thickness and width. Therefore, we take only the temperature variation in the length direction into account when solving the equation.
Also, we assume the temperature at interconnect terminals connected by vias is the same as the constant underlying layer temperature, T ref . Therefore, the temperature distribution along an interconnect with thickness t m , width w m and length L can be formulated by the following heat diffusion equation [12]: where T(x) represents the temperature profile of the interconnect. k m and k ins are the thermal conductivity of the interconnect and the underlying interlayer dielectric (ILD), respectively. j rms is the uniform root-mean-square current density flowing in the interconnect. ρ o is the resistivity of the interconnect at the reference temperature, T ref . β is the temperature coefficient of resistance (°C -1 ). ε is the Thomson coefficient. The third term represents the heat loss resulting from the Thomson effect, which is very small and is neglected here. The forth term is the energy loss due to the heat transmission between the adjacent interconnects through the insulator. t ins is the thickness of the ILDs. w * is the effective interconnect width for thermal diffusion. By solving eq. (1), we can obtain: because the fluctuation of the resistivity due to the tem-perature fluctuation is small enough to be ignored [12], α can be simplified to It is assumed that the number of the vias in the interconnect of interest is n. Because of the via effect, the interconnect average temperature increase T avg can be expressed as the total temperature increase divided by the interconnect length, L: where T n (x) is the temperature profile between via n-1 and via n. L is the total interconnect length, l i is the distance between via i-1 and via i. Let the number of the vias be even (eight vias for example) and the vias in the cooling area are equidistantly arranged. The detailed temperature increment with multiple dummy vias is shown in Figure 2. Let T l be the average temperature increase of the main interconnect, and let T v be the average temperature increase of the interconnect of length l between adjacent vias in the cooling area. The average temperature increase T l and T v can be expressed as Temperature profile for an interconnect with multiple vias. The solid line represents the temperature profile of an interconnect that has multiple dummy vias, and the dotted line represents the thermal distribution of the same interconnect with only two vias. ( 2) 1 tanh[ ( ( 2) )] 2 1 2 .

Effect of multiple dummy vias on thermal conductivity of the ILDs
Dummy vias have different effects on the average temperature increase for different ILDs [12]. To obtain the correct interconnect temperature increase, the effect of multiple dummy vias can be incorporated into the effective thermal conductivity during the analysis of interconnect characteristics. The average interconnect temperature increase can be expressed as where R thermal represents the thermal resistance of the interconnect. j thermal is the heat transfer rate. k * ins is the effective thermal conductivity of ILD. If we set eqs. (7) and (8) We define ξ as the dummy via correction coefficient, and it is expressed as Therefore, Using eq. (11) we find that the value of ξ is larger than 1, and it increases as n becomes larger. Accordingly, the low-k dielectrics become more thermally conductive, because of the presence of the dummy vias. Table 1 shows the effect of the dummy via number on the effective thermal conductivity for different ILDs. Table 1 shows the multi-via effect on the conductivity for three kinds of dielectrics, SiO 2 , Orion and air. From the table it can be seen that the lower the nominal thermal conductivity, the more the via number effects the effective thermal conductivity of a low-k dielectric. When n = 10, the effective thermal conductivity of the air becomes 0.064 W/m K, which is almost twice its nominal thermal conductivity. Also, the effective thermal conductivity is doubled when n = 30 for Orion and when n = 78 for SiO 2 .
The relationship between the interconnect average temperature increase (°C) and the via number for different ILDs is shown in From Table 2, it can be seen that the interconnect average temperature increase for ILDs with low thermal conductivities are larger than those for ILDs with high thermal conductivities. However, the via effect is more sensitive to n for low-k dielectrics. For example, with air as the ILD, the interconnect average temperature increase is 105.13°C when n = 2, and it is 43.60°C when n = 12, which is less than 50% of the original temperature increment. This is the reason why the interconnect average temperature increase is not as high as commonly estimated when low-k materials are used in advanced interconnect structures. As a result, increasing the number of dummy vias is a simple and effective way to decrease the interconnect average temperature increase.

Extension of the application of the multi-via effect
When n is constant and l = L/(n-1), the interconnect average temperature increase is minimized. The minimum interconnect average temperature increase is given as follows: Interconnect average temperature increase is dependent on the separation of the dummy vias. Figure 3 shows the relationship between the interconnect average temperature increase and via separations for 65-nm technology [16].
Let n be 11, and let the interconnect length be 2000 μm. We used seven different via separations, namely, 50, 80, 100, 150, 200, 210 and 220 μm, to analyze the effect of via separation on interconnect average temperature increase. From Figure 3, it can be seen that the minimum interconnect average temperature increase happens at l = 200 μm. It can also be seen that the change of interconnect average temperature increase varies smoothly over the range l = 80-210 μm for an SiO 2 ILD. However, the interconnect average temperature increase changes significantly for different via separations as the thermal conductivity is reduced, which is shown in Figure 3(b) and (c). As a result, for a constant number of the dummy vias, we can adjust the via separation to reduce the interconnect temperature increase and decrease the power dissipation.
For a given l, using eq. (7), the interconnect average temperature increase is minimized when For a constant interconnect length (l = 200 μm), the number of the dummy vias vs. the interconnect average temperature increase is shown in Figure 4.
In Figure 4, it can be seen that the average interconnect temperature increase has an approximately linear relationship with via number. The increased the thermal conductivity of the ILD is, the more linear the relation is. Therefore, the via number can be estimated by the calculated temperature increase for a constant via separation.

Conclusion
A novel analytical model for analyzing the interconnect average temperature increase in the presence of multiple vias is developed in this paper. The proposed model incorporates the multi-via effect into the thermal conductivity of the ILD to obtain a more accurate calculation of the interconnect average temperature increase. For a number of different ILDs, this paper discusses the interconnect average temperature increase in terms of the multi-via effect. We concluded that the multi-via effect has a significant effect on the effective thermal conductivity of the ILD. Moreover, two extended applications of the proposed model are presented. Using these applications, we can minimize the interconnect average temperature increase to decrease the power dissipation of the interconnect. The proposed model can help IC designers estimate the interconnect average temperature increase, modify the interconnect arrangement and obtain the expected interconnect average temperature increase. Likewise, the proposed model with the multi-via  effect can also be used to research and improve models of interconnect delay, crosstalk and power dissipation.