Special Issue on Applied Reconfigurable Computing

Applied reconfigurable computing refers to the use of reconfigurable devices to create complex custom computing systems. Examples of the types of devices focused on by the papers in this issue include field-programmable gate arrays (FPGAs) and coarse-grained reconfigurable arrays (CGRAs). Both allow pre-fabricated silicon devices to be configured and reconfigured at run-time to execute highperformance computations. For many important computational areas the resulting systems can perform orders of magnitude faster than software solutions. Two of these computational areas include high-performance signal processing and control engineering as well as neural networks and machine learning. In addition, sophisticated design tools can aid in the creation of such reconfigurable systems and applications, and the development of such tools is an important research area in the field. The papers in this special issue focus on these three areas. Papers for this special issue were invited from the 15th International Symposium on Applied Reconfigurable Computing (ARC 2019) held at Technische Universität Darmstadt in Darmstadt, Germany from April 9th to 11th 2019. A total of 14 research groups were invited to prepare extended versions of their papers from the symposium and, after a rigorous review process, 8 papers were selected for inclusion in this special issue. This issue begins with two papers in the area of highperformance signal processing and control engineering. The paper UltraSynth: Insights of a CGRA Integration into a Control Engineering Environment explains how a CGRA


Editorial
Applied reconfigurable computing refers to the use of reconfigurable devices to create complex custom computing systems. Examples of the types of devices focused on by the papers in this issue include field-programmable gate arrays (FPGAs) and coarse-grained reconfigurable arrays (CGRAs). Both allow pre-fabricated silicon devices to be configured and reconfigured at run-time to execute highperformance computations. For many important computational areas the resulting systems can perform orders of magnitude faster than software solutions. Two of these computational areas include high-performance signal processing and control engineering as well as neural networks and machine learning. In addition, sophisticated design tools can aid in the creation of such reconfigurable systems and applications, and the development of such tools is an important research area in the field. The papers in this special issue focus on these three areas.
Papers for this special issue were invited from the 15th International Symposium on Applied Reconfigurable Computing (ARC 2019) held at Technische Universität Darmstadt in Darmstadt, Germany from April 9th to 11th 2019. A total of 14 research groups were invited to prepare extended versions of their papers from the symposium and, after a rigorous review process, 8 papers were selected for inclusion in this special issue.
This issue begins with two papers in the area of highperformance signal processing and control engineering. It's usage is demonstrated in the HighFlipCV library which is an open source HLS library for image processing. The last paper in this section Efficient Design of Pruned Convolutional Neural Networks on FPGA proposes a method to prune CNNs and shows an architecture that efficiently executes pruned networks on an FPGA. Particularly, the interplay between pruning and batching is studied in detail.
The concluding set of papers focuses on tools and techniques for the creation of reconfigurable systems and applications. The first paper in this group is The TaPaSCo Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems . The TaPaSCo framework presented in the paper provides an automated toolflow for the construction of heterogeneous many-core architectures from custom processing elements, and a simple, uniform programming interface for using spatially distributed, parallel computation on FPGAs. The second tools paper is Generating high-performance FPGA accelerator designs for big data analytics with Fletcher and Apache Arrow . This paper describes the open source tool Fletcher, built on top of Apache Arrow, and which provides a framework designed to deal with the challenges of integrating FPGA-based accelerators into big data analytics pipelines. The combined system accomplishes this by providing a common in-memory format for tabular data sets, a set of associated hardware components, and an associated open source tool to generate hardware interfaces for use by big data analytics accelerators. The final tools paper is Evaluation of Static Mapping for Dynamic Space-Shared Multi-Task Processing on FPGAs . It first analyzes the shortcomings of previous approaches for dynamically mapping multiple heterogenous tasks onto an executing FPGA and then proposes a static partitioning and mapping approach and tool for the problem, demonstrating more than a doubling of system throughput compared to previous methods.
These eight contributions encompass a wide range of research topics, thereby appealing to both the experts in the field and those who want a snapshot of the current breadth of research in the rapidly expanding field of applied reconfigurable computing.
We would like to thank the reviewers for their constructive comments and many suggestions they made to improve the articles. We also thank the authors for their contributions and work to revise their submissions, with the result being an excellent special issue. We hope that the reader will benefit from this selection of research highlights from the field of reconfigurable computing. Sincerely,

Christian Hochberger Brent Nelson
Funding Open Access funding enabled and organized by Projekt DEAL.
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