Equivalence checking and intersection of deterministic timed finite state machines

There has been a growing interest in defining models of automata enriched with time, such as finite automata extended with clocks (timed automata). In this paper, we study deterministic timed finite state machines (TFSMs), i.e., finite state machines with a single clock, timed guards and timeouts which transduce timed input words into timed output words. We solve the problem of equivalence checking by defining a bisimulation from timed FSMs to untimed ones and vice versa. Moreover, we apply these bisimulation relations to build the intersection of two timed finite state machines by untiming them, intersecting them and transforming back to the timed intersection. It is known that many problems like inclusion and equivalence checking are undecidable for timed automata. Our results show that TFSMs correspond to a decidable subclass of timed automata that admits a restricted form of ε\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\varepsilon $$\end{document}-transitions (i.e., timeouts) where most of the relevant problems like equivalence and intersection are decidable.


Introduction
Finite automata (FA) and finite state machines (FSMs) are formal models widely used in the practice of engineering and science, e.g., in application domains ranging from sequential circuits, communication protocols, embedded and reactive systems, to biological modelling.
Since the 90s, the standard classes of FA have been enriched with the introduction of time constraints to represent more accurately the behaviour of systems in discrete or continuous time.Timed automata (TA) are such an example: they are finite automata augmented with a number of resettable real-time clocks, whose transitions are triggered by predicates involving clock values [3].
More recently, timed models of FSMs (TFSMs) have been proposed in the literature by the introduction of time constraints such as timed guards or timeouts.Timed guards restrict the input/output transitions to happen within given time intervals.The meaning of timeouts is the following: if no input is applied at a current state for some timeout period, the timed FSM moves from the current state to another state using a timeout function; e.g., timeouts are common in telecommunication protocols and systems.
For instance, the timed FSM proposed in [25,18,19] features: one clock variable, time constraints to limit the time elapsed at a state, and a clock reset when a transition is executed.Instead, the timed FSM proposed in [32,27] features: one clock variable, TFSM with timed guards and timeouts TFSM with timeouts TFSM with timed guards Loop-free TFSM with timeouts TFSM with LCRO timed guards Untimed FSM Figure 1: Comparison of TFSM models.time constraints to limit the time elapsed when an output has to be produced after an input has been applied to the FSM, a clock reset when an output is produced, and timeouts.
In [12] the following models of deterministic TFSMs with a single clock were investigated: TFSMs with only timed guards, TFSMs with only timeouts, and TFSMs with both timed guards and timeouts.
The problem of equivalence checking was solved for all three models, their expressive power compared, and subclasses of TFSMs with timeouts and with timed guards equivalent to each other were characterized (see Fig. 1 from [12] for a diagram showing the expressivity hierarchy of TFSMs with timed guards and timeouts, TFSMs with only timed guards, TFSMs with only timeouts, loop-free TFSMs with timeouts, TFSMs with LCRO -Left Closed Right Open -timed guards, and finally untimed FSMs).Equivalence checking was obtained by introducing relations of bisimulation that define untimed finite state machines whose states include information on the clock regions, such that the timed behaviours of two timed FSMs are equivalent if and only if the behaviours of the companion untimed FSMs are equivalent.This operation is reminiscent and stronger than the region graph construction for timed automata [3].
Here we work directly with deterministic TFSMs with both timed guards and timeouts, since they subsume the previous two models.For such TFSMs, we give the detailed construction of the untimed FSM from a timed FSM (what we get is the FSM abstraction of the TFSM), and then we provide the complete proof that we can describe the behavior of a TFSM using the corresponding untimed FSM, i.e., that two deterministic TFSMs are equivalent if and only if their timed-abstracted FSMs are equivalent.
Then we study the conditions under which the opposite transformation is possible: we take an untimed deterministic FSM that accepts and produces words from input and output alphabets (both including a special symbol that simulates the passing of time), and we build an equivalent deterministic TFSM with timeouts and timed guards, under the same notion of abstraction of timed words.This is the key technical result of this paper.
Finally, we apply the previous transformations to perform the intersection of two deterministic TFSMs, as an example of composition operator under which TFSMs are closed.We prove how the transformation from TFSMs to untimed FSMs of Section 2 and the transformation from untimed FSMs to TFSMs of Section 3 can be used to construct the intersection of two TFSMs.
We outline the structure of the paper.Sec. 2 introduces deterministic timed finite state machines with timed guards and timeouts, describes the untiming procedure to obtain a finite state machine and proves the bisimulation with the original timed one, from which an equivalence checking procedure follows.This is a revision of the material in [12], whereas the following sections are completely new.Sec. 3 describes the backward transformation from untimed FSMs to TFSMs and proves the backward bisimulation relation.The two results are used in Sec. 4 to compute the TFSM that is the intersection of two given deterministic TFSMs.Sec. 5 relates TFSMs to timed automata, and surveys expressiveness and complexity results of various models of timed automata, with final conclusions drawn in Sec. 6.

Models of Timed FSMs (TFSMs)
Let be a finite alphabet, and let R + be the set of non-negative reals.A timed symbol is a pair ( , ) where ∈ R + is called the timestamp of the symbol ∈ .A timed word is then defined as a finite sequence ( 1 , 1 ) ( 2 , 2 ) ( 3 , 3 ) . . . of timed symbols where the sequence of timestamps 1 ≤ 2 ≤ 3 ≤ . . . is increasing.Timestamps represent the absolute times at which symbols are received or produced.In the following we will sometime also reason in terms of relative times, or delays, measured as the difference between the timestamps of two successive symbols.More formally, the delay of a symbol is defined as − −1 when > 1 and as 1 when = 1.
The timed models considered in this paper are initialized input/output machines that operate by reading a timed input word ( 1 , 1 ) ( 2 , 2 ) . . .( , ) defined on some input alphabet , and producing a corresponding timed output word ( 1 , 1 ) ( 2 , 2 ) . . .( , ) on some output alphabet .The production of outputs is assumed to be instantaneous: the timestamp of the -th output is the same of the -th input .Models where there is a delay between reading an input and producing the related output are possible but not considered here.Given a timed word denotes the word obtained when deleting the timestamps.
A timed possibly non-deterministic and partial FSM (TFSM) is an FSM augmented with a clock.The clock is a real number that measures the time delay at a state, and its value is reset to zero when a transition is executed.In this section we introduce the TFSM model with both timed guards and timeouts defined in [12].Such a model subsumes the TFSM model with timed guards only given in [18,25] and the TFSM model with timeouts only given in [32,43].In addition, we establish a very precise connection between timed and untimed FSMs, showing that it is possible to describe the behavior of a TFSM using a standard FSM that is called the FSM abstraction of the TFSM.
A timed guard defines the time interval when a transition can be executed.Intuitively, a TFSM in the present state accepts an input at a time only if satisfies the timed guard of some transition labelled with input symbol .The transition defines the output to be produced and the next state ′ .A timeout instead defines for how long the TFSM can wait for an input in the present state before spontaneously moving to another state.Each state of the machine has a timeout (possibly ∞) and all outgoing transitions of the state have timed guards with upper bounds less than the state timeout.The clock is reset to 0 every time the TFSM activates a transition or a timeout expires.Definition 1 (Timed FSM).A timed FSM is a finite state machine augmented with timed guards and timeouts.Formally, a timed FSM (TFSM) is a 6-tuple ( , , , , 0 , Δ ) where , , and are finite disjoint non-empty sets of states, inputs and outputs, respectively, 0 is the initial state, ⊆ × ( × Π) × × is a transition relation where Π is the set of input timed guards, and where is a nonnegative integer, while is either a nonnegative integer or ∞, ≤ , and ∈ (, [ while ∈ ), ] .
The timed state of a TFSM is a pair ( , ) such that ∈ is a state of and ∈ R + is the current value of the clock, with the additional constraint that < Δ ( ) ↓N (the value of the clock cannot exceed the timeout).If no input is applied at a current state before the timeout Δ ( ) ↓N expires, then the TFSM will move to anther state Δ ( ) ↓ as prescribed by the timeout function.If Δ ( ) ↓N = ∞, then the TFSM can stay at state infinitely long waiting for an input.An input/output transition can be triggered only if the value of the clock is inside the guard , labeling the transition.Transitions between timed states can be of two types: • timed transitions of the form ( , ) − → ( ′ , ′ ) where ∈ R + , representing the fact that a delay of time units has elapsed without receiving any input.The relation − → is the smallest relation closed under the following properties: for every timed state ( , ) and delay ≥ 0, if + < Δ ( ) ↓N , then ( , ) − → ( , + ); for every timed state ( , ) and delay ≥ 0, if + = Δ ( ) ↓N , then • input/output transitions of the form ( , ) , − − → ( ′ , 0), representing reception of the input symbol ∈ , production of the output ∈ and reset of the clock.An input/output transition can be activated only if there exists ( , , , , , ′ ) ∈ such that ∈ , .
The usual definitions for FSMs of deterministic and non-deterministic, submachine, etc., can be extended to the timed FSM model considered here.In particular, a TFSM is complete if for each state , input and value of the clock there exists at least one transition ( , ) , − − → ( ′ , 0), otherwise the machine is partial.A TFSM is deterministic if for each state , input and value of the clock there exists at most one input/output transition, otherwise is non-deterministic.
For the sake of simplicity, from now on we consider only deterministic machines (possibly partial), leaving the treatment of non-deterministic TFSMs to future work.So for a partial and deterministic TFSM , we have that for every input word , ( ) is either not defined or a singleton set.Moreover, we can consider the transition relation of the machine as a partial function : × ×R + ↦ → × that takes as input the current state , the delay and the input symbol and produces the (unique) next state and output symbol ( , , ) = ( ′ , ) such that ( , 0) − → ( ′ , ′ ) , − − → ( ′′ , 0).With a slight abuse of the notation, we can extend it to a partial function : × ( × R + ) * ↦ → × * that takes as inputs the initial state and a timed word , and returns the state reached by the machine after reading and the generated output word.We will use , − −− → ′ as a shorthand for ( , ) = ( ′ , ).
Abstracting TFSMs with timeouts and timed guards.In this section we show how to build an abstract untimed FSM that describes the behaviour of a TFSM with guards.To do this we define an appropriate notion of abstraction of a timed word into an untimed word and a notion of bisimulation to compare a TFSM with guards with untimed FSM.From the properties of the bisimulation relation, we conclude that the behaviour of the abstract untimed FSM is the abstraction of the behaviour of the TFSM.
For every ≥ 0, we define I as the set of intervals Given a TFSM , we define max( ) as the maximum between the greatest timeout value of the function Δ (different from ∞) and the greatest integer constant (different from ∞) appearing in the guards of .The set I defines a discretization of the clock values of TFSMs.The following lemma proves that such a discretization is correct, namely, that a TFSM cannot distinguish between two timed states where the discrete state is the same and the values of the clocks are in the same interval of I .
We can exploit the discretization given by I to build the abstract FSM as follows.
States of the abstract FSM will be pairs ( , , ′ ) where is a state of and , ′ is either a point-interval [ , ] or an open interval ( , + 1) from the set I defined above, where = max( ).Transitions can be either standard input/output transitions labelled with pairs from × or "time elapsing" transitions labelled with the special pair (Ø, Ø), which intuitively represents a time delay 0 < * < 1 without inputs.
(a) TFSM with timeouts and timed guards 0 Definition 3. Given a TFSM with timeouts and timed guards = ( , , , , 0 , Δ ), let = max( ).We define the Ø-abstract FSM = ( × I , ∪ {Ø}, ∪ {Ø}, , ( 0 , [0, 0])) as the untimed FSM such that: Figure 2 shows an example of a TFSM with timeouts and its Ø-abstraction.In this case the untimed abstraction accepts untimed input words on ∪ {Ø}.The delay is implicitly represented by sequences of the special input symbol Ø interleaving the occurrences of the real input symbols from .The representation of delays in the abstraction is quite involved: • an even number 2 of Ø symbols represents a delay of exactly time units; • an odd number 2 + 1 of Ø symbols represents a delay included in the open interval ( , + 1).
The notion of abstraction of a timed word captures the above intuition.
To prove that Ø-bisimilar machines have the same behavior we need to introduce the following technical result, connecting timed transitions with the special symbol Ø.
The following lemma proves that Ø-bisimilar machines have the same behavior.
Theorem 1.A TFSM with timeouts and timed guards is Ø-bisimilar to the abstract FSM .
We can use the above theorem to solve the equivalence problem for TFSM with timed guards.

Corollary 1. Let
and ′ be two TFSM with timeouts and timed guards.Then and ′ are equivalent if and only if the two abstract FSM and ′ are equivalent.
Proof.The claim is a direct consequence of Theorem 1 and Lemma 3.

From untimed FSMs to TFSMs
In the previous section we have shown how to build an abstract untimed FSM that represents the behaviour of a TFSM, by means of appropriate notions of bisimulation and of abstraction of timed words.In this section we study the conditions under which the opposite transformation is possible: we take an untimed FSM that accepts and produces words from input and output alphabets that include the special symbol Ø, and we show how to build an equivalent TFSM with timeouts and timed guards, under the same notion of abstraction of timed words.Now, let and be, respectively, the input and output alphabets of our machines.We are interested in studying untimed FSMs that accept words in ( ∪ {Ø}) * and produce words in ( ∪ {Ø}) * .Clearly, not all untimed FSMs represent valid timed behaviours.In particular, since in our TFSMs model outputs are instantaneously produced when an input is received, and since a TFSM cannot stop the advancing of time, we have that a deterministic untimed FSM = ( , ∪ {Ø}, ∪ {Ø}, , 0 ) can be transformed into a TFSM only if every state of respects the following two conditions: 1.

5:
for all ∈ do 6: A T T ( , , ) return T We call any untimed FSM that respects the above two conditions time progressive.
In the following we prove that every deterministic time progressive FSM can be transformed into an equivalent TFSM with timeouts and timed guards.Since we cannot directly compare the behavior of an untimed FSM with the behavior of a timed FSM, we will use the notion of Ø-abstraction of a timed word (Definition 4) to compare timed and untimed machines.Definition 6.Given a deterministic and time progressive FSM = ( , ∪ {Ø}, ∪ {Ø}, , 0 ), and a TFSM with timed guards and timeouts = ( , , , , 0 , Δ ), we say that refines if and only if for every timed input word = ( 1 , 1 ) . . .( , ) we have that (Ø( )) = Ø( ( )).
The intuition behind the construction is the following.Since we start from a deterministic and time progressive FSM , from every state of there exists exactly one transition with input Ø (and output Ø).Hence, given a state we can build the (infinite) "delay run" Since the number of states of is finite, we have that the delay run is "lasso shaped", namely, that it consists of a prefix

Ø,Ø
− − → .The refined TFSM will have the same set of states of .Then, for every state the delay run is computed, and the transitions and timeouts are defined as follows: • every / transition leaving a state in the prefix is replaced with a timed transition from with an appropriate timed guard; • a timeout corresponding to the length of the prefix forces to switch from to a state in the loop.
Algorithms 1 and 2 describe the above procedure in detail.To simplify the code, we will unfold the final loop once, and put the timeout in correspondence to the second occurrence of in the delay run.Moreover, since is assumed to be deterministic, we consider the transition relation as a partial function : × ∪ {Ø} ↦ → × ∪ {Ø} returning the next state and the output.
We prove the correctness of our construction by showing that the TFSM obtained from Algorithm 1 is Ø-bisimilar to .Hence, by Lemma 3, we can immediately conclude that is a refinement of .
The loop terminates when is a M state, that is, when it reaches the first repetition of a state in the delay run from .Lines 13-19 take care of setting appropriately the timeout at state .Two different situations may arise: either = [ , ] or = ( , + 1) for some ∈ N. In the former case, the state is repeated after an even number of transitions, which corresponds to an integer time delay.Hence, the timeout at is set to Δ ( ) = ( , ).Consider now the predecessor of in the delay run.By the invariant, we have that ( , ) ∼ for every ∈ ( −1, ).Hence, we have that and ( , 0) ∼ , respecting conditions 1 and 2 of Definition 5.In the latter case ( = ( , + 1)), is repeated after an odd number of transitions.Since the timeout at must be an integer value, lines 14-19 repeat the construction of the while loop one more time and then update to a state that corresponds to precisely + 1 time units before setting the timeout.As in the previous case, we can prove that the invariant is respected.
Figure 3 shows the TFSM with timeouts and timed guards that can be obtained by applying Algorithm 1 to the untimed FSM of Figure 2(b), where the states have been renamed as follows: In the picture, transitions with adjacent guards have been merged: for instance, the application of the algorithm creates the transitions ( 0 , , 1 , [0, 0], 0 ) and the transition ( 0 , , 1 , (0, 1), 0 ) that are merged into the unique transition ( 0 , , 1 , [0, 1), 0 ) in the picture.The picture includes only the states that are reachable from the initial state 0 .This shows that in the final result only the three states 0 , 2 and 5 are relevant: the other states have been replaced by either timed guards or timeouts.
To better understand how Algorihm 1 works, let us review the application of function A T T (Algorithm 2) to the initial state 0 (state ( 0 , [0, 0]) in the picture) of the untimed FSM of Figure 2(b).The procedure starts by unmarking all states of and by initialising the current state to 0 and the current guard to [0, 0].Then the while loop of lines 5-12 follows the sequence of Ø/Ø transitions in , marking the states it reaches, until a previously marked state is found.At lines 7-9, for every I/O transition exiting the current state, a corresponding timed transition labelled with the current value of is added to the TFSM.Then the current state is updated to the next state in the sequence of Ø/Ø transitions and is increased following the sequence [0, 0], (0, 1), [1,1], (1, 2), . . . .In this example, the first iteration of the while loop considers all I/O transitions exiting from the state 0 of , namely the transition Notice that the starting state of the timed transition is still 0 .The Ø/Ø transition between 0 and 1 of models the fact that the machine waits for a time included in the interval (0, 1) before accepting an input.This situation is modelled in the TFSM by adding the guard (0, 1) to the transition while keeping 0 as starting state.Then the loop continues by adding the following transitions to the TFSM: At this point, the current state of is 5 (i.e., ( 1 , (1, ∞))) and the guard is (2, 3).Because of the self loop on Ø/Ø of in state 5 , at the end of the loop does not change and is updated to [3,3]: a previously marked state is reached and the loop terminates.Lines 13-19 of A T T set the timeout at state 0 to ( 5 , 3), terminating the function call.The value of the timeout is set to 3 because the first marked state is reached after 6 Ø/Ø transitions, which corresponds to 3 time units.A subsequent call to A T T on state 5 will set the timeout at state 5 to ( 5 , 1) (i.e., the self-loop on = 1 depicted in the figure), to model the fact that in the untimed FSM there is a self-loop on Ø/Ø at state 5 .In this way, the sequence of Ø/Ø transitions 0 Figure 4: Ø-abstraction of the TFSM in Figure 3.

units. The application of A T
T to the other states of builds the rest of the TFSM.
By applying the equivalence checking methodology presented in Section 2, we can prove that the TFSM of Figure 3 is indeed equivalent to the TFSM of Figure 2(a).Figure 4 shows the Ø-abstraction of the TFSM of Figure 3, which is equivalent to the FSM of Figure 2(b) (by standard FSM state-minimization of the FSM in Figure 4, we get a reduced FSM isomorphic to the one in Figure 2(b)).This is consistent with the fact that the FSM of Figure 2

Intersection of TFSMs
In this section we apply the previous transformations to perform the intersection of TFSMs.In general, TFSMs can be composed to build complex systems out of simpler components.Several composition operators exist for untimed FSMs, the most relevant ones being the intersection operator, the serial composition, and synchronous and asynchronous parallel composition (see [40]).Parallel composition of TA was discussed in [35].Preliminary work on parallel composition of TFSMs with timed guards and output delays can be found in [29], and on parallel composition of TFSMs with timeouts and output delays in [26].When extending compositions to Timed FSMs, one must verify that TFSMs are closed under the type of composition of interest.In our setting, this means that the behaviour of the composed system should be represented by a machine with only a single clock.Here we focus on the intersection operator for which we show that closure holds.
In the following we show how the transformation from TFSMs to untimed FSMs of Section 2 and the transformation from untimed FSMs to TFSMs of Section 3 can be used to implement the intersection of TFSMs.Suppose that we have two TFSMs 1 and 2 and that we want to compute the intersection 1 ∩ 2 whose behaviour is the intersection of the behaviours of 1 and 2 .We can proceed as follows: 1. compute the Ø-abstract FSMs 1 and 2 as in Definition 3 for, respectively, 1 and 2 ; 2. intersect 1 and 2 using the standard algorithm for untimed FSMs, obtaining the untimed FSM = 1 ∩ 2 ; 3. compute the TFSM that is Ø-bisimilar with using Algorithm 1.

. ( , ) if and only if
1 ( ) and 2 ( ) are defined and such that 1 ( ) = 2 ( ) = .Proof.Let 1 and 2 be two deterministic TFSMs, and let 1 and 2 be their respective Ø-abstractions.By Definition 3 we have that 1 and 2 are deterministic and time progressive.Hence, the intersection 1 ∩ 2 is also deterministic and time progressive and Algorithm 1 can be applied to obtain the TFSM .
As an example, consider the TFSMs 1 and 2 of Figure 5, and suppose we want to compute the intersection 1 ∩ 2 .Following the above procedure, the first step is to obtain the Ø-abstract FSMs 1 and 2 in Figure 6.Then, by applying the standard constructions for intersection and minimization of untimed FSMs, we obtain the machine depicted in Figure 7 and finally, using Algorithm 1, the TFSM = R ( 1 ∩ 2 ) of Figure 8.It is worth pointing out that the intersection of two complete and deterministic TFSMs is still a deterministic machine, but it may be partial.This is indeed the case of our example: for instance, when the TFSM in Figure 8 is in state 0 it can react to the input only when the clock is in the intervals [0, 0] or (1,2).No behaviour is specified when the clock is inside the interval (0, 1] and [2,3).In state 1 and 13 no behaviour is specified when the clock has an integer value smaller than the timeout (0, 1, 2 and 3 for state 1, 0 for state 13).

Timed FSMs and Timed Automata
In this section, we compare TFSMs with Timed Automata (TA), and survey the known results on the expressivity and computability of various classes of TA, according to their computational resources.The landscape of finite automata augmented with time is much (0, 1) (2, ∞)  more complex than in the case of untimed ones, where both language recognizers (FA) and producers (FSMs) share the fact that there is an underlying common model with corresponds to regular languages (FSMs transform regular input languages into regular output languages).TA are the most common formalism obtained by adding timing constraints (as clocks) to finite-state automata [3], defining timed regular recognizers.TA are a more expressive model than TFSMs because they allow multiple clocks, invariants as conditions on clocks associated to a location, guards as conditions on clocks associated to a transition, resets by which a clock may be reset to 0 or may be kept unchanged, and states which are products of a location and clock valuations.Excellent surveys about the classes of TA proposed in the literature can be found in [24,42].
TFSMs can be transformed into TA with -transitions (called also in the literature silent transitions or internal transitions or non-observable transitions) by the following transformation: • there is one location of the TA for every state of the TFSM; • given the input and output alphabets and of the TFSM, the alphabet of the TA is given by × • as in the TFSM, the TA has a single clock, reset to zero at every transition; • intervals on transitions are replaced with guards; • timeouts of the TFSM are replaced by invariants and -transitions.An example of such transformation is shown in Fig. 9, where on the left there is a TFSM and on the right the corresponding TA.
This reduction is not necessarily practical, since decision problems are in general undecidable for timed automata, even for restricted versions of them.In the following we mention some of these relevant results.For a classic survey on decision problems for timed automata, see [5], where the following results can be found: 1. TA are closed under union, intersection, projection, but not under complementation.
2. The language emptiness problems is PSPACE-complete (a by-product of reachability analysis obtained by means of the region construction).
3. The universality.inclusion and equivalence problems for TA are undecidable.
4. Deterministic TA are closed under union.intersection and complementation, but not under projection.The language emptiness, universality, inclusion and equivalence problems for deterministic TA are PSPACE-complete.
Further results are proved in [22] and [23], e.g., that one cannot decide whether a given timed automaton is determinizable or whether the complement of a timed regular language is timed regular.One may wonder whether the complexity goes down, if we reduce the resources of the timed automaton.The answer is sometimes yes, but only in very restricted cases.In [34,1] it is shown that the problem of checking language inclusion ( ) ⊆ ( ) of TA and is decidable if has no -transitions.and either has only one clock, or the guards of use only the constant 0. These two cases are essentially the only decidable instances of language inclusion, in terms of restricting the various resources of timed automata.Similar conclusions for the universality problem (does a given TA accept all timed words) are drawn in [2]: the one-clock universality problem is undecidable for TA over infinite words, and decidable for TA over finite words, but undecidable for both if -transitions are allowed.Model checking and reachability of timed automata with one or two clocks are discussed in [30,21].
It is a fact that reducing resources, like the number of clocks, may simplify some problems, but allowing -transitions, even with few resources, makes the problems as hard as in the general case.A score of papers [7,8,15,9] investigated the expressiveness of timed automata augmented with -transitions, and proved the following results: 1.The class of timed languages recognized by timed automata with -transitions is more robust and expressive than those without them.
2. A timed automaton with -transitions that do not reset clocks can be transformed into an equivalent one without -transitions (equivalent means with the same timed language).
3. A (non-Zenonian) timed automaton such that no -transitions that reset clocks lie on a direct cycle can be transformed into an equivalent one without -transitions.
4. There is a timed automaton, with an -transition which resets clocks on a cycle, which is not equivalent to any timed automaton without -transitions.
More undecidability questions for timed automata with -transitions were answered in [11], e.g.: given a timed automaton with -transitions, it is undecidable to determine if there exists an equivalent timed automaton without -transitions.
The problem of removing -transitions got a new twist in [17], where it was shown that if one allows periodic clock constraints and periodic resets (updates), then we can remove -transitions from a timed automaton; moreover, the authors proved that periodic updates are necessary, defining a language that cannot be accepted by any timed automaton with periodic constraints and transitions which reset clocks to 0 and no -transitions.
In conclusion, timed automata are a rich model with and without -transitions, therefore in general their decision problems are undecidable or very difficult also for restricted versions, even more so if -transitions are admitted.
An interesting restricted model are Real-Time Automata (RTA) introduced by C. Dima [16] in 2001: they are finite automata with a labeling function (from states to an alphabet) and a time labeling function (from states to rational intervals) which together define the label of a state.RTA work over signals that are functions with finitely many discontinuities from non-negative rational intervals [0, ) (with > 0) to an alphabet, so that the domain of a signal is partitioned into finitely many intervals where the signal is constant.A run is associated with a signal iff there is a sequence of partitioning points consistent with the state labels (stuttering, i.e., repetition of signal values is allowed); signals associated with an accepting run are the timed language associated to an RTA.The author states in [16] that RTA can be viewed as a class of state-labeled timed automata over timed words (instead than signals) with a single clock which is reset at every transition (stuttering being reduced to -transitions).Moreover, it is claimed that RTA are the largest timed extension of finite automata whose emptiness and universality problems are decidable, -transitions can be removed, there is a determinization construction, are closed under complementation, and a version of Kleene theorem holds.
More complex classes of timed automata have been studied, in which the interplay between variants of the basic constituents defining them yields interesting combinations of expressivity and computability.
Event-Clock Automata [4] (ECTA) are a determinizable robust subclass of timed automata.Event-clock automata are characterized with respect to timed automata by the fact that explicit resets of clocks are replaced by a predefined association with the input symbols such that for each input ∈ Σ: a global recorder clock records the time elapsed since the last occurrence of and a global predictor clock measures the time required for the next occurrence of (clock valuations are determined only by the input timed words).They are closed under Boolean operations (TA are not closed under complement) and language inclusion is PSPACE-complete for them (it is undecidable for TA).It is mentioned in [16] that RTA are incomparable with ECTA, which are the largest known determinizable subclass of timed automata.since RTA may accept languages that ECTA cannot.
Timed Automata with Non-Instantaneous Actions [6] are such that an action can take some time to be completed; they are more expressive that timed automata and less expressive than timed automata with -transitions.Updatable Timed Automata were introduced in [10] as an extension to update the clocks in a more elaborate way than simply resetting them to 0; their emptiness problem is undecidable, but there are interesting decidable subclasses.Any updatable automaton belonging to some decidable subclass can be effectively transformed into an equivalent timed automaton without updates, but with -transitions.
A complete taxonomy of timed automata is presented in [24], and issues of undecidability are discussed in depth in [33].Properties of timed automata are contrasted in [13] with those of a special class of hybrid automata with severe restrictions on the discrete transitions: hybrid systems with strong resets, which have the property that all the continuous variables are non-deterministically reset after each discrete transition, (differently from timed automata, where flow rates are constant, and it is not compulsory to reset variables on each discrete transition).Connections between timed automata and timed discrete-event models are explored in [37].
The trade-off in preferring TA vs.TFSMs depends also on the specific problem at hand.For instance, TA and TFSMs are used when deriving tests for discrete event systems.However, methods for direct derivation of complete test suites over TA return infinite test suites [38].Therefore, to derive complete finite test suites with a guaranteed fault coverage, a TA is usually converted to an FSM and FSM-based test derivation is then used (see [36,20]).Therefore, TFSMs may be preferred over TA and other models when the derivation of complete tests is required (as done in [19] for TFSMs with timed guards), even though the test suites so obtained are rather long.We mention also that the FSM abstraction introduced in this paper was used in [39], to derive complete finite test suites for TFSMs with both timeouts and timed guards.Since FSMs are used for testing, state distinguishability, and state identification problems of hardware and software designs (see [31,14,28]), TFSMs may be applied to the timed versions of these problems, instead than using TA.

Conclusions
We investigated deterministic TFSMs with a single clock, with both timed guards and timeouts.We showed that the behaviours of the timed FSMs are equivalent if and only if the behaviours of the companion untimed FSMs obtained by time-abstracting bisimulations are equivalent, so that they exhibit a good trade-off between expressive power and ease of analysis.
Then we defined and proved the correctness of the backward construction from Untimed FSMs to TFSMs.The construction starts from any deterministic FSM recognizing a subset of the language ( Ø /Ø) * / * ( Ø /Ø) * and builds a deterministic TFSM that recognizes the corresponding timed language.Using the two constructions we showed how to intersect two deterministic TFSMs, first by transforming them into untimed FSMs, then applying the standard intersection algorithm for untimed FSMs, and then transforming back into a deterministic TFSM.Future work includes studying more general composition operators to define and solve equations over deterministic TFSMs [41], and addressing the previous problems for TFSMs with output delays [32] and nondeterministic TFSMs. 0

Figure 3 :
Figure 3: Example of application of Algorithm 1.

of is replaced by the sequence of timeout transitions 0 3 − → 5 1 − → 5 1 −
→ . . . .In both cases the machines can wait in 5 forever, if no input is received in the first 3 time 0 (b) is the Ø-abstraction of the TFSM of Figure 2(a).

(Figure 9 :
Figure 9: Transformation from TFSM (on the left) to -timed automaton (on the right).