On the electrical characteristics of Al/p-Si diodes with and without (PVP: Sn-TeO2) interlayer using current–voltage (I–V) measurements

The present study aims to investigate the effect of (PVP: Sn-TeO2) interfacial layer on the electrical parameters of the Al/p-Si diode. For this aim, (Sn-TeO2) nanostructures were developed by the ultrasound-assisted method, and both their electrical and optical characteristics were investigated by XRD, SEM, EDS, and UV–Vis methods. The bandgap of Sn-TeO2 was found as 4.65 eV from the (αhυ)2 vs (hυ) plot. The main electrical parameters of the Al/p-Si diodes with/ without (PVP: Sn-TeO2) interlayer, such as ideality factor (n), zero-bias barrier height (Φ0), and series resistance (Rs), were calculated by applying and comparing two methods of thermionic emission theory and Cheung’s functions. These results show that the presence of the (PVP: Sn-TeO2 interlayer, along with the increase of Φ0, and the decrease of n and Rs, led to a significant increment in the rectification of MPS when compared to MS diode. The current-transport mechanisms (CTMs) of them were examined through the forward LnIF − LnVF and reverse LnIR − VR0.5 bias currents, and then, the Poole–Frenkel and Schottky field-lowering coefficients (β) were calculated and obtained its value from the theoretical and experimental methods showed that the mechanism of the reverse current of MS and MPS diodes is governing by the Schottky emission and Pool-Frenkel mechanism, respectively.


Introduction
Metal-semiconductor (MS) contacts with/without an interfacial layer, which play a key role in the present-day technology, are used in components such as microwave detectors (MDs), solar cells (SCs), field-effect transistors (FETs), and varactor or photodiodes (VDs/PDs). In MS structure, the conductivity or current transport mechanism depends on various factors such as surface preparation, barrier formation at M/S interface and its homogeneity, density of surface states (N ss ) at M/S interface which have energies in the bandgap interval of the semiconductor, doping concentration of donor/acceptor atoms (N D /N A ), temperature, frequency, applied voltage, etc. [1][2][3][4][5][6]. When a polymer or insulating layer is placed between metal and semiconductors by various techniques, MS diode converts to MIS or MPS type diodes and leads to changes in both the electrical and dielectric properties. Therefore, recently, they were used in a wide range of electronics and optoelectronics applications. Such an interfacial layer may be created or passivated many traps or states at M/S interface and changes the current conduction mechanism of the structure by trapping and releasing free charge carriers. Also, these levels/traps, in turn, change the efficiency and rectification of the diode by affecting parameters, e.g., n, R s , and barrier height (BH) [7,8].
Tin telluride (SnTe) is an IV-VI semiconductor with a narrow bandgap of 0.18 eV. SnTe belongs to a new class of topological crystalline insulators (TCIs) and has a band degeneracy. SnTe is a thermoelectric material that shows interesting optical and electronic properties. This substance could be used in mid-IR photodetectors and thermoelectric generators when is slightly doped [9,10]. Tellurium dioxide (TeO 2 ) has also a wide band-gap semiconductor that can be used in gas sensors, deflectors, optical memories, optical filters, and waveguides owing to its special electro-optical and acoustic-optical properties [11][12][13][14][15][16][17]. On the other hand, polymers have long-chain molecules and are used in electronic components, instead of insulators, due to their merits, e.g., easy preparation, low cost, lightness, etc. As they have limited conductivity, some efforts have been recently made to increase their conductivity using metal atoms and metal oxides, as well as doping. Among polymers, polyvinylpyrrolidone (PVP) has unique advantages, including easy thin-film preparation, flexibility, adjustable conductivity and resistivity, relatively high environmental stability, non-toxic properties, low cost, and good conductivity. Thus, it is a potential alternative to traditional layers in diodes and capacitors [18,19].
The main aim of this study is to investigate the effect of (PVP: Sn-TeO 2 ) interlayer on the electrical characteristics of the Al/p-Si diode. For this purpose, (Sn-TeO 2 ) were fabricated by the Microwave-assisted method and both their electrical and optical characteristics were investigated by XRD, SEM, EDS, and UV-Vis methods. After that n, Φ 0 , R s values of them were calculated from the TE emission and Cheung's functions and compared. The CTMs of them were also investigated the forward and reverse bias region.
These results show that the existence of the (PVP: Sn-TeO 2 interlayer leads to an increase of Φ 0 , and a decrease of n and R s . The value of RR for the MPS diode was also found significantly higher than the MS diode.

Experimental procedure
Sn-TeO 2 nanostructures were prepared using the microwaveassisted method. To do this, the sodium tellurite (Na 2 TeO 3 ) and tin (II) chloride (SnCl 2 ) precursors were purchased from Loba Chemie Co. 20 ml of 0.2 M solution of both precursors were prepared with distilled water and mixed. The pH of the sodium tellurite and tin chloride solutions were 10 and 2, respectively, and reached 8 after being mixed. The resulting mixture was exposed to 180 W microwave irritation for 15 min. After the washing step, the resulting mixture was placed in an oven at 40 °C for 45 h to be dried.
The relevant tests for investigating the structural, optical, electrical, and dielectric characteristics of prepared nanostructures and diodes were performed using an X-ray diffractometer (Philips, X λ = 1.5406 Å), FESEM (Tescan-Mira III, Czech Republic), ultraviolet-visible spectroscope (UV-1800, Shimadzu, Japan), KEYSIGHT (E4980Al 20 Hz-1 MHz) and KEITHLEY 2450 source-meter, respectively. The PVP: Sn-TeO 2 interfacial layer was deposited on the p-type silicon using the spin coating technique. 10 mg nanostructures were used for this layer, whereas the concentration of water-soluble PVP was 5%. Before the deposition process, the surface was prepared for deposition and various solutions were used to wash the silicone surface, as described in Ref. [8].

Structural analysis
The structural and morphological features of prepared nanostructures are shown in Fig. 1a and b, respectively. According to Fig. 1a, the diffraction peaks at 2θ = 26.3° and 48.7° belong to (110) and (212) crystalline planes of the tetragonal structure of TeO 2 [20], which are related to the P41212 space group with parameters of a = b = 4.8 Å and c = 7.6 Å. This is in agreement with the standard XRD PDF card (ICSD # 01-084-1777). Also, the diffraction peak at 2θ = 30.1° is matched with the standard XRD PDF card (00-046-1210) related to the cubic structure of SnTe, which belongs to the Fm3m space group with lattice parameters of a = b = c = 6.3 Å. The average size of nanostructures is calculated by the following equation: where D is the crystal size (nm) and the rest of the parameters are defined in the previous report. According to Eq. (1), the average sizes of TeO 2 [related to (110) and (212) crystal plates] and SnTe nanoparticles were estimated at 31 nm and 41 nm. Figure 1b presents the FESEM image and EDS spectrum of the sample. As shown, the nano-clusters have dimensions of less than 200 nm and are composed of almost spherical nanoparticles with an average size of 40 nm. Also, the EDS analysis shows that the nanostructures contain only Te and Sn elements (Fig. 2).
The optical characteristics of nanostructures were evaluated using the ultraviolet-visible spectroscopy (UV-1800, Shimadzu, Japan) and their energy gap was calculated by the linear part of (αhν) 2 -photon energy (hν) plot: where B is a constant, α is the absorption coefficient, and the value of n is 2 and 0.5 for indirect and direct transitions, respectively. According to Eq. (2), the energy gap of Sn-TeO 2 nanostructures for direct transition is 4.65 eV. Figure 2a and b show the absorption spectrum and the energy gap plot of the prepared sample, respectively.

Electrical characteristics
The electrical characteristics of MS and MPS diodes were investigated by measuring current and voltage using the KEITHLEY 2450 source-meter instrument. Figure 3a and b exhibit the I-V curves of MS and MPS diodes in the voltage range of ± 4.5 V at ambient temperature, respectively. As seen in Fig. 3, both diodes have a Schottky contact behavior, which means that they have a rectifying behavior with a very small leakage current in the reverse bias region. It is also observed that the MPS diode has a much better rectifying behavior rather than the MS one. In the direct bias region of the I-V curve at low voltages, the number of current increases exponentially with voltage, which is due to the depletion layer width in the M/S interface. At higher voltages, the current increases linearly because the depletion layer width is minimized, and as a result, the (PVP: Sn-TeO 2 ) interfacial layer acts as a series resistance. In the reverse bias region, a small current passes through the diode thanks to the increased depletion layer width, and also, because the whole current is caused by the minority carriers of the interfacial layer. [21] As indicated in Fig. 3b, the leakage current of the MPS diode is much lower than that of the MS one owing to the presence of an interfacial layer. The current-voltage equation of the Schottky junctions (V > 3kT/q) is expressed according to the thermionic emission (TE) theory as follows [22]: where I 0 is the reverse-saturation current, which can be calculated from the intercept of the LnI-V plot at V = 0. The Thus, the value Φ B0 was calculated from the Eq. (4a) using the experimental value of I o and rectifier contact area (A) and the other parameters have been introduced in previous works [8,23,24]. The calculated Φ B0 of the MS and MPS diodes are 0.62 eV and 0.76 eV, respectively. The ideality factor, which indicates the degree of deviation from the thermionic emission theory, is determined by 3.57 and 2.97 for the MS and MPS diodes, according to Eq. (4b), respectively. As is clear, both of these values are greater than one. In general, the value of n is dependent on interfacial layer thickness (d i ) and its permittivity (ε), depletion layer width (W d ) or doping concentration atoms, and surface states as n = 1 + d i /ε i d i [ε s /W d + qNss]. In this case, the applied bias voltage on the diode will be shared (4a) by the interfacial layer, R s , and depletion layer [25,26]. The existence of barrier inhomogeneity is the other reason for higher ideality factor states [2][3][4].
To determine the transport mechanism of charge carriers and diode behavior in direct and reverse bias, Ln (I F ) − LnV F and Ln (I R ) − V R plots of both MS and MPS diodes are presented in Fig. 4a and b. Figure 4a shows that the plot has two and three linear sections with different slopes for the MS and MPS diodes, which are named I, II, III. The current conduction/transport mechanisms differ from one region to another due to various factors, e.g., BH heterogeneity, R s , and density of Nss [7,8].
As seen, the dependence of the current on the voltage has as an exponential relation: I ~ V m , where m is related to the slope of each region. The slopes of regions I, II, III for the MS diode (region I: 0.01 < V < 0.10 V, region II: 0.21 < V < 0.40 V, and region III: 0.48 < V < 4.50 V) are 1.49, 2.79, and 1.45, while the relevant values for the MPS diodes (region I: 0.03 < V < 0.28 V, region II: 0.38 < V < 2.28 V, region III: 2.60 < V < 4.50 V) are 1.35, 5.07, and 2.27, respectively. The slopes of regions I, III of the MS diode, and the slope of the region I of the MPS diode, are close to one, and the current is directly proportional to the applied voltage, indicating the ohmic behavior of the diodes in the aforementioned region. In this region, the current follows i = qnμV/d, where n, μ, d, are the density of free carriers, mobility, and thickness of the interfacial polymer layer, respectively. The slopes of region II of the MS diode and region III of the MPS diode are close to 2, which is explained by space charge-limited current (SCLC) mechanism. The slope of region II of the MPS diode is greater than 2 and can be described by the trap-charge limited current (TCLC) mechanism with an exponential distribution of traps. When the PVP: Sn-TeO 2 interfacial layer is placed in the metal-semiconductor interface, a series of energy states/ traps is created due to the interfacial layer. This phenomenon takes place within the semiconductor energy gap below the Fermi level, which changes the conductivity mechanism by storing and releasing electrons. The results of the LnI F − LnV F plot specify that at very low applied voltages, the density of the injected carriers is much lower than that of the thermal-generated free charge carriers, and the current increases linearly with voltage (region I). At intermediate voltages, as voltage increases, the injected charges increase and begin to fill the traps, leading to increasing the current exponentially (region II). At higher voltages, the increasing in voltage causes an approach to the trap-filled limit state, and accordingly, an increase in the series resistance and a reduction in the slope of the plot. In this state, space chargelimited current mechanism dominates. The presence of the interfacial layer at the metal-semiconductor interface has induced arising the current of the MPS diode with voltage exponentially in the intermediate voltage region, which is owing to the surface states/traps. Nevertheless, this is not observed for the MS diodes [3,7,27].
Two Poole-Frenkel emissions (PFE) and Schottky emission (SE) theories are usually used to study the mechanism governing the current in reverse bias. To do this, the Ln (I R ) − V R and Ln (I R ) − √ V plots are drawn with I-V information and shown in Fig. 4b.
Both mechanisms governing PFE and SE currents are described as follows [28,29]: where β PF and β S are the Poole-Frenkel and Schottky field-lowering coefficients, respectively. According to Eq. (5), field-lowering coefficients can be calculated by the slope of the Ln (I R ) − √V R plot. β PF is twice β S and their theoretical value is expressed as follows: where ε is the permittivity of the interfacial layer.
The theoretical values of β PF and β S for the MS diode are 4.2 × 10 −5 and 2.1 × 10 −5 eV m 1/2 V −1/2 , respectively, while those for the MPS diode are 1.2 × 10 −5 and 6.0 × 10 −6 eV (5a) Fig. 4 the plots of a LnI F − LnV, b Ln (I R ) − V R and Ln (I R ) − √V R of MS and MPS diodes m 1/2 V −1/2 . Also, the value of the field-lowering coefficient is calculated through the slope of the plot in Fig. (4b), which is 6.0 × 10 −6 and 1.5 × 10 −5 eV m 1/2 V −1/2 for MS and MPS diodes, respectively. A comparison of the obtained results shows that the obtained experimental field-lowering coefficients for MS is close to the theoretical Schottky-emission (SE) coefficient (β SE ) and for MPS is close to the theoretical Poole-Frenkel emission (FPE) coefficient (β PFE ). Therefore, the reverse leakage current in the MS structure is dominated by the SE mechanism, and in MPS structure is dominated by the PFE mechanism.
In SE, the carrier transport occurs from the contact interface instead of the bulk material due to the nonuniformity structure of the interlayer. While in FPE, the carrier transport is formed from the metal into conductive dislocations via trap or states [28,30]. Another parameter affecting the efficiency of Schottky diodes is the rectification ratio (RR), which is defined as RR = I F /I R . The rectification ratios of MS and MPS diodes for 4.5 V are estimated 4.56 and 320, respectively. A significant increase in the rectification ratio of the MPS diode, compared to the MS diode, is due to the presence of an interfacial layer, which can lead to a growth in direct current or a drop in reverse current. This increase is very important in the rectification of electronic components, especially Schottky junctions. To determine why the value of R is raised, the resistance parameter can be used, which is defined by Ohm's law (R i = V i /I i ). The constant value of resistance at high direct bias voltages is called series resistance (R s ) and at high reverse bias, voltages are called shunt resistance (R sh ). The voltage dependence plots (R i − V) of both diodes are shown in Fig. 5. The series resistance and shunt resistance values of the MS diode are calculated 3.14 kΩ and 14.3 kΩ, respectively, and for MPS diodes, they are estimated 450 Ω and 144 kΩ. The results exhibit that the interfacial layer reduces the series resistance and increases the shunt resistance, and as a result, both increased direct current and reduced reverse current significantly uplift the rectification ratio of the MPS diode, compared to that of MS one.
In the following, the values of barrier height, ideality factor, and series resistance are calculated using Cheung's method and compared to the results obtained from the thermionic emission theory. According to this method, Eq. (3) can be rewritten as follows: In the curvature of the I-V curve, the dV/dLn(I) plot is linear concerning I in the direct bias region, where the values of series resistance and the ideality factor can be calculated through its slope and intercept. The barrier height can also be estimated from the dependence of the To calculate the barrier height, it is necessary to determine the value of the ideality factor, which is obtained by Eq. (4). Using Eqs. (7) and (8), the values of R s , n, and Φ Β are estimated 3.38 KΩ, 5.58, 0.62 eV for MS diodes, and 241 Ω, 5.74, 0.75 eV for MPS diodes, respectively. The results of this method also indicate that the (PVP: Sn-TeO 2 ) interfacial layer reduces the series resistance and the ideality factor and increases the barrier height, and consequently, improves the efficiency of the metal-semiconductor diode. The main parameters obtained from both methods are presented in Table 1.
All these experimental results show that the use of (PVP: Sn-TeO 2 interlayer between Al and p-Si leads to an increase of Φ 0 , and the decrease of n and R s . The value of RR for the MPS diode was also found significantly higher than the MS diode. In recent years, similar results have been reported by various studies [31][32][33][34][35][36][37][38][39][40].

Conclusions
In the present study, the Al/(PVP: Sn-TeO 2 )/p-Si and Al/p-Si diodes were made using a spin coating method, and the effect of the interfacial layer on its electrical characteristics was investigated. The average sizes of TeO 2 [related to (110) and (212) crystal plates] and SnTe nanoparticles were estimated at 31 nm and 41 nm. The EDS analysis shows that the nanostructures contain only Te and Sn elements. The energy bandgap of the prepared (Sn-TeO 2 ) nanostructure was found as 4.65 eV from the (αhυ) 2 vs (hυ) plot. Electrical parameters of the fabricated Al/p-Si diodes with and without (PVP: Sn-TeO 2 ) interlayer were extracted both the standard TE theory and Cheung functions using I-V measurements in the voltage range of ± 4.5 V at room temperature. The CTMs of them were also examined both the forward bias LnI F -LnV F and reverse LnI R − V R 0.5 plots. LnI F − LnV F plot shows that the dependence of the current on the voltage has as an exponential relation: I ~ V m , where m is related to the slope of each region. Both the experimental and theoretical value β was calculated from the LnI R − V R 0.5 plot and the results show that the CTM is governed by the SE emission and PFE emission for MS and MPS diodes, respectively. All these experimental results indicated that the existence of the (PVP: Sn-TeO 2 interlayer leads to an increase of Φ 0 , RR, and the decrease of n, R s . The observed discrepancies in the main electrical parameters obtained from TE theory and Cheung functions can be attributed to the nature of the calculation method and also voltage-dependent of them. Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if changes were made. The images or other third party material in this article are included in the article's Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article's Creative Commons licence and your intended use is not  permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http://creat iveco mmons .org/licen ses/by/4.0/.