On Symmetric Circuits and Fixed-Point Logics

We study properties of relational structures such as graphs that are decided by families of Boolean circuits. Circuits that decide such properties are necessarily invariant to permutations of the elements of the input structures. We focus on families of circuits that are symmetric, i.e., circuits whose invariance is witnessed by automorphisms of the circuit induced by the permutation of the input structure. We show that the expressive power of such families is closely tied to definability in logic. In particular, we show that the queries defined on structures by uniform families of symmetric Boolean circuits with majority gates are exactly those definable in fixed-point logic with counting. This shows that inexpressibility results in the latter logic lead to lower bounds against polynomial-size families of symmetric circuits.


Introduction
A property of graphs on n vertices can be seen as a Boolean function which takes as inputs the n 2 potential edges (each of which can be 0 or 1) and outputs either 0 or 1.For the function to really determine a property of the graph, as opposed to a function of a particular presentation of it, the function must be invariant under re-ordering the vertices of the graph.That is, permuting the n 2 inputs according to some permutation of [n] leaves the value of the function unchanged.We call such Boolean functions invariant.Note that this does not require the Boolean function to be invariant under all permutations of its inputs, which would mean that it was entirely determined by the number of inputs that are set to 1.
The interest in invariant functions arises in the context of characterising the properties of finite relational structures (such as finite graphs) that are decidable in polynomial time.It is a long-standing open problem in descriptive complexity to give a characterisation of the polynomial-time properties of finite relational structures (or, indeed, just graphs) as the classes of structures definable in some suitable logic (see, for instance, [6,Chapter 11]).It is known that fixed-point logic FP and its extension with counting FPC are strictly less expressive than deterministic polynomial time P [2].
It is easy to see that every polynomial-time property of graphs is decided by a P-uniform family of polynomial-size circuits that are invariant in the sense above.On the other hand, when a property of graphs is expressed in a formal logic, it gives rise to a family of circuits that is explicitly invariant or symmetric.By this we mean that its invariance is witnessed by the automorphisms of the circuit itself.For instance, any sentence of FP translates into a polynomial-size family of symmetric Boolean circuits, while any sentence of FPC translates into a polynomial-size family of symmetric Boolean circuits with majority gates.
Concretely, a circuit C n consists of a directed acyclic graph whose internal gates are marked by operations from a basis (e.g., the standard Boolean basis B std := {AND, OR, NOT} or the majority basis B maj = B std ∪ {MAJ}) and input gates which are marked with pairs of vertices representing potential edges of an n-vertex input graph.Such a circuit is symmetric if C n has an automorphism π induced by each permutation σ of the n vertices, i.e., π moves the input gates of C n according to σ and preserves operations and wiring of the internal gates of C n .Clearly, any symmetric circuit is invariant.
Are symmetric circuits a weaker model of computation than invariant circuits?We aim at characterising the properties that can be decided by uniform families of symmetric circuits.Our main result shows that, indeed, any property that is decided by a uniform polynomial-size family of symmetric majority circuits can be expressed in FPC.
Theorem 1.A graph property is decided by a P-uniform polynomial-size family of symmetric majority circuits if, and only if, it is defined by a fixed-point with counting sentence.
A consequence of this result is that inexpressibility results that have been proved for FPC can be translated into lower bound results for symmetric circuits.For instance, it follows (using [3]) that there is no polynomial-size family of symmetric majority circuits deciding 3-colourability or Hamiltonicity of graphs.
We also achieve a characterisation similar to Theorem 1 of symmetric Boolean circuits.
Theorem 2. A graph property is decided by a P-uniform polynomial-size family of symmetric Boolean circuits if, and only if, it is defined by a fixed-point sentence interpreted in G ⊕ [n], ≤ , i.e., the structure that is the disjoint union of an n-vertex graph G with a linear order of length n.
Note that symmetric majority circuits can be transformed into symmetric Boolean circuits.But, since FP, even interpreted over G ⊕ [n], ≤ , is strictly less expressive than FPC, our results imply that any such translation must involve a super-polynomial blow-up in size.Similarly, our results imply with [2] that invariant Boolean circuits cannot be transformed into symmetric circuits (even with majority gates) without a super-polynomial blow-up in size.On the other hand, it is clear that symmetric majority circuits can still be translated into invariant Boolean circuits with only a polynomial blow-up.
Support.The main technical tool in establishing the translation from uniform families of symmetric circuits to sentences in fixed-point logics is a support theorem (stated informally below) that establishes properties of the stabiliser groups of gates in symmetric circuits.
We say that a set X ⊆ [n] supports a gate g in a symmetric circuit C on an n-element input structure if every automorphism of C that is generated by a permutation of [n] fixing X also fixes g.It is not difficult to see that for a family of symmetric circuits obtained from a given first-order formula φ there is a constant k such that all gates in all circuits of the family have a support of size at most k.To be precise, the gates in such a circuit correspond to subformulas ψ of φ along with an assignment of values from [n] to the free variables of ψ.The set of elements of [n] appearing in such an assignment forms a support of the gate and its size is bounded by the number of free variables ψ.Using the fact that any formula of FP is equivalent, on structures of size n, to a first-order formula with a constant bound k on the number of variables and similarly any formula of FPC is equivalent to a first-order formula with majority quantifiers (see [8]) and a constant bound on the number of variables, we see that the resulting circuits have supports of constant bounded size.Our main technical result is that the existence of supports of bounded size holds, in fact, for all polynomial-size families of symmetric circuits.In its general form, we show the following theorem in Section 3 via an involved combinatorial argument.
Theorem 3 (Informal Support Thm).Let C be a symmetric circuit with s gates over a graph of size n.If n is sufficiently large and s is sub-exponential in n, then every gate in C has a support of size O log s log n .
In the typical instantiation of the Support Theorem the circuit C contains a polynomial number of gates s = poly(n) and hence the theorem implies that every gate has a support that is bounded in size by a constant.The proof of the Support Theorem mainly relies on the structural properties of symmetric circuits and is largely independent of the semantics of such circuits; this means it may be of independent interest for other circuit bases and in other settings.
Symmetric Circuits and FP.In Section 4 we show that each polynomial-size family C of symmetric circuits can be translated into a formula of fixed-point logic.If the family C is P-uniform, by the Immerman-Vardi Theorem [11,7] there is an FP-definable interpretation of the circuit C n in the ordered structure [n], ≤ .We show that the support of a gate is computable in polynomial time, and hence we can also interpret the support of each gate in [n], ≤ .The circuit C n can be evaluated on an input graph G by fixing a bijection between [n] and the universe U of G.We associate with each gate of g of C n the set of those bijections that cause g to evaluate to 1 on G.This set of bijections admits a compact (i.e., polynomial-size) representation as the set of injective maps from the support of g to U .We show that these compact representations can be inductively defined by formulas of FP, or FPC if the circuit also admits majority gates.
Thus, we obtain that P-uniform family of symmetric Boolean circuits can be translated into formulas of FP interpreted in G combined with a disjoint linear order [|G|], ≤ , while families containing majority gates can be simulated by sentences of FPC.The reverse containment follows using classical techniques.As a consequence we obtain the equivalences of Theorems 1 & 2, and a number of more general results as this sequence of arguments naturally extends to: (i) inputs given as an arbitrary relational structure, (ii) outputs defining arbitrary relational queries, and (iii) non-uniform circuits, provided the logic is allowed additional advice on the disjoint linear order.Related Work.We note that the term "symmetric circuit" is used by Denenberg et al. in [5] to mean what we call invariant circuits.They give a characterisation of first-order definability in terms of a restricted invariance condition, namely circuits that are invariant and whose relativisation to subsets of the universe remains invariant.Our definition of symmetric circuits follows that in [9] where Otto describes it as the "natural and straightforward combinatorial condition to guarantee generic or isomorphism-invariant performance."He then combines it with a size restriction on the orbits of gates along with a strong uniformity condition, which he calls "coherence", to give an exact characterisation of definability in infinitary logic.A key element in his construction is the proof that if the orbits of gates in such a circuit are polynomially bounded in size then they have supports of bounded size.We remove the assumption of coherence from this argument and show that constant size supports exist in any polynomial-size symmetric circuit.This requires a generalisation of what Otto calls a "base" to supporting partitions.See Section 6 for more discussion of connections with prior work.

Preliminaries
Let [n] denote the set of positive integers {1, . . ., n}.Let Sym S denote the group of all permutations of the set S. When S = [n], we write Sym n for Sym [n] .

Vocabularies, Structures, and Logics
A relational vocabulary (always denoted by τ ) is a finite sequence of relation symbols Members of the universe A are called elements of A. A multi-sorted structure is one whose universe is given as a disjoint union of several distinct sorts.Define the size of a structure |A| to be the cardinality of its universe.
First-Order and Fixed-Point Logics.Let FO(τ ) denote first-order logic with respect to the vocabulary τ .The logic FO(τ ) is the set of formulas whose atoms are formed using the relation symbols in τ , an equality symbol =, an infinite sequence of variables (x, y, z . ..), and that are closed under the Boolean connectives (∧ and ∨), negation (¬), and universal and existential quantification (∀ and ∃).Let fixed-point logic FP(τ ) denote the extension of FO(τ ) to include an inflationary fixed-point operator ifp.Assume standard syntax and semantics for FO and FP (see the textbook [6] for more background).For a formula φ write φ(x) to indicate that x is the tuple of the free variables of φ.For a logic L, a formula φ(x) ∈ L(τ ) with k free variables, A ∈ fin[τ ], and tuple a ∈ A k write A |= L φ[a] to express that the tuple a makes the formula φ true in the structure A with respect to the logic L. We usually drop the subscript L and write A |= φ[a] when no confusion would arise.
Let FPC(τ ) denote the extension of (FP + ≤)(τ ) with a counting operator # x where x is a point or number variable.For a structure A ∈ fin[τ ] and a formula φ(x) ∈ FPC(τ ), # x φ(x) is a term denoting the element in the number sort corresponding to |{a ∈ A | A |= φ[a]}|.See [6, Section 8.4.2] for more details.Finally, we consider the extension of fixed-point logic with both advice functions and counting quantifiers (FPC + Υ)(τ ).
Using k-tuples of number variables, it is possible in FP + ≤ and FPC to represent numbers up to n k and perform arithmetic operations on them.We omit details but use such constructions freely.

Symmetric and Uniform Circuits
A Boolean basis (always denoted by B) is a finite set of Boolean functions from {0, 1} * to {0, 1}.We consider only bases containing symmetric functions, i.e., for all f ∈ B, f (x) = f (y) for all n ∈ N and x, y ∈ {0, 1} n with the same number of ones.The standard Boolean basis B std consists of unbounded fan-in AND, OR, and unary NOT operators.The majority basis B maj extends the standard basis with an operator MAJ which is one iff the number of ones in the input is at least the number of zeroes.

Definition 4 (Circuits on Structures
• W ⊆ G × G is a binary relation called the wires of the circuit.We require that (G, W ) forms a directed acyclic graph.Call the gates with no incoming wires input gates, and all other gates internal gates.Gates h with (h, g) ∈ W are called the children of g.
• Ω is an injective function from U q to G. The gates in the image of Ω are called the output gates.When q = 0, Ω is a constant function mapping to a single output gate.
• Λ is a sequence of injective functions (Λ R ) R∈τ where for each R ∈ τ , Λ R maps each relational gate g with R = Σ(g) to Λ R (g) ∈ U r where r is the arity of R.Where no ambiguity arises, we write Λ(g) for Λ R (g).
Let C be a Boolean (B, τ )-circuit with universe U , A ∈ fin[τ ] with |A| = |U |, and γ : A → U be a bijection.Let γA denote the τ -structure over the universe U obtained by relabelling the universe of A according to γ. Recursively evaluate C on γA by determining a value C[γA](g) for each gate g: (i) a constant gate evaluates to the bit given by Σ(g), (ii) a relational gate evaluates to 1 iff γA |= Σ(g)(Λ(g)), and (iii) an internal gate evaluates to the result of applying the Boolean operation Σ(g) to the values for g's children.C defines the q-ary query Q ⊆ A q where a ∈ Q iff C[γA](Ω(γa)) = 1.
Definition 5 (Invariant Circuit).Let C be a (B, τ )-circuit with universe U computing a q-ary query.The circuit C is invariant if for every A ∈ fin[τ ] with |A| = |U |, a ∈ A q , and bijections Invariance indicates that C computes a property of τ -structures which is invariant to presentations of the structure.Moreover, for an invariant circuit C only the size of U matters and we often write C = C n to emphasise that C n has a universe of size n.A family C = (C n ) n∈N of invariant (B, τ )-circuits naturally computes a q-ary query on τ -structures.When q = 0 the family computes a Boolean property of structures.We now discuss a structural property of circuits called symmetry that implies invariance.Symmetric Circuits.Permuting a circuit's universe may induce automorphisms of the circuit.
The principle goal of this paper is to understand the computational power of circuit classes with the following type of structural symmetry.Definition 7 (Symmetric).A circuit C with universe U is called symmetric if for every permutation σ ∈ Sym U , σ induces an automorphism of C.
It is not difficult to see that, for a symmetric circuit C, there is a homomorphism h : Sym U → Aut(C) (where Aut(C) denotes the automorphism group of C) such that h(σ) is an automorphism induced by σ.As long as some element of U appears in the label of some input gate of C, h is an injective homomorphism.Henceforth we assume that this is always the case as otherwise C has no relational inputs and computes a constant function.Circuits where the homomorphism is not also surjective introduce artifacts into our arguments.To avoid this we require the circuits we consider to be rigid.
To show that for rigid symmetric circuits C, any injective homomorphism from Sym U to Aut(C) is surjective, it suffices to show that each σ ∈ Sym U induces a unique automorphism in Aut(C).Proposition 9. Let C be a rigid circuit with universe U , and σ ∈ Sym U .If σ induces an automorphism of C, that automorphism is unique.
We defer the proof of this proposition to Section 4.1 were we also show that symmetric circuits can be transformed into equivalent rigid symmetric circuits in polynomial time, and hence show that rigidity can be assumed of circuits without loss of generality in our setting.For a rigid symmetric circuit C, the group of automorphisms of C is exactly Sym U acting faithfully.We shall therefore abuse notation and use these interchangeably.In particular, we shall write σg to denote the image of a gate g in C under the action of the automorphism induced by a permutation σ in Sym U .
An examination of the definitions suffices to show that symmetry implies invariance.In symmetric circuits it is useful to consider those permutations which induce automorphisms that fix gates.Let P be a partition of a set U .Let the pointwise stabiliser of P be Stab U (P) := {σ ∈ Sym U | ∀P ∈ P, σP = P }, and similarly define the setwise stabiliser Stab U {P} := {σ ∈ Sym U | ∀P ∈ P, σP ∈ P}.For a gate g in a rigid symmetric circuit C with universe U , let the stabiliser of g be Stab U (g) := {σ ∈ Sym U | σ(g) = g}, and let the orbit of g under the automorphism group Aut(C) of C be Orb(g Uniform Circuits.One natural class of circuits are those with polynomial-size descriptions that can be generated by a deterministic polynomial-time machine. Definition 10 (P and P/poly-Uniform).A (B, τ )-circuit family C = (C n ) n∈N computing a q-ary query is P/poly-uniform if there exists an integer t ≥ q and function Υ : N → {0, 1} * which takes an integer n to a binary string Υ(n) such that |Υ(n)| = poly(n), and Υ(n) describes1 the circuit C n whose gates are indexed by t-tuples of {0, 1, . . ., n}, inputs are labelled by t-tuples of [n], and outputs are labelled by q-tuples of [n].Moreover, if there exists a deterministic Turing machine M that for each integer n computes Υ(n) from 1 n in time poly(n) call C P-uniform.
Note that such uniform families implicitly have polynomial size.It follows from the Immerman-Vardi Theorem [11,7] that any P-uniform family C = (C n ) n∈N of circuits is definable by an FP interpretation in the sense that there is a sequence of formulas • For all g ∈ G and a ∈ • For all relational gates g ∈ G and a ∈ , where r is the arity of R = Σ(g).
More generally, if C = (C n ) n∈N is a P/poly-uniform family of circuits, there is an (FP + Υ)definable interpretation of C n in A Υ for a suitable advice function Υ.
Over ordered structures neither P-uniform nor P/poly-uniform circuits need compute invariant queries as their computation may implicitly depend on the order associated with [n].To obtain invariance for such circuits we assert symmetry.The next section proves a natural property of symmetric circuits that ultimately implies that symmetric P-uniform circuits coincide with FP definitions on the standard and majority bases.

Symmetry and Support
In this section we analyse the structural properties of symmetric circuits.We begin with a formal definition of support.
Definition 11 (Support).Let C be a rigid symmetric circuit with universe U and let g be a gate in C. A set X ⊆ U supports g if, for any permutation σ ∈ Sym U such that σx = x for all x ∈ X, we have σg = g (i.e., σ ∈ Stab U (g)).
In this section we show how to associate supports of constant size in a canonical way to all gates in any rigid symmetric circuit of polynomial size.Indeed, our result is more general as it associates moderately growing supports to gates in circuits of sub-exponential size.As a preliminary to the proof, we introduce, in Section 3.1, the more general notion of a supporting partition for a permutation group.We show how to associate a canonical such supporting partition with any permutation group G and obtain bounds on the size of such a partition based on the index of G in the symmetric group.These results are then used in, Section 3.2, to bound the size of partitions supporting stabiliser groups of gates based on the size of the circuit, proving our main technical result-the Support Theorem.

Supporting Partitions
The notion of a supporting partition generalises the notion of a support of a gate by replacing the set with a partition and the stabiliser group of the gate with an arbitrary permutation group.
Definition 12 (Supporting Partition).Let G ⊆ Sym U be a group and P a partition of U .We say that P is a supporting partition of G if Stab U (P) ⊆ G.
For intuition consider two extremes.When G has supporting partition P = {U }, it indicates G = Sym U .Saying that G has supporting partition P = {{u 1 }, {u 2 }, . . ., {u |U| }} indicates only that G contains the identity permutation, which is always true.
A natural partial order on partitions is the coarseness relation, i.e., P ′ is as coarse as P, denoted P ′ ⊇ P, if every part in P is contained in some part of P ′ .For two partitions P and P ′ , there is a most refined partition that is as coarse as either partition: Definition 13.Let P, P ′ be partitions of U .Define a binary relation ∼ on U : u 1 ∼ u 2 iff there exists P ∈ P ∪ P ′ such that u 1 , u 2 ∈ P .Let E(P, P ′ ) denote the partition of U corresponding to the equivalence classes of U under the transitive closure of ∼.Now it is easy to show that E preserves supporting partitions (the proof is similar to that of (*) on page 379 of [9]).
Proposition 14.Let G ⊆ Sym U be a group and P, P ′ be supporting partitions of G. Then E(P, P ′ ) is also a supporting partition of G.
Proof.Let E := E(P, P ′ ) = {E 1 , . . ., E m }.Suppose σ ∈ Stab(E) and we now show that σ ∈ G.Because the parts E i are disjoint write σ as σ 1 • • • σ m where σ i ∈ Sym Ei (i.e., it permutes only the elements of E i ).Indeed each σ i may be written as a sequence of transpositions of elements in E i .Thus it suffices to show that each transposition (uu ′ ) with u, u ′ ∈ E i can be written as a sequence of permutations in Stab(P) ∪ Stab(P ′ ) ⊆ G. Since u, u ′ ∈ E i there is a sequence of elements of u 1 , . . ., u ℓ with u 1 = u, u ℓ = u ′ and u j ∼ u j+1 for j ∈ [ℓ − 1] witnessing the path from u to u ′ .By the definition of ∼, for each j ∈ [ℓ − 1] there is P ∈ P ∪ P ′ such that u j , u j+1 ∈ P and therefore (u j u j+1 ) is a transposition in Stab(P) ∪ Stab(P ′ ).Conclude that the transposition ) is a sequence of transpositions from Stab(P) ∪ Stab(P ′ ) and the proof is complete.This implies that each permutation group has a unique coarsest partition that supports it.
Lemma 15.Each permutation group G ⊆ Sym U has a unique coarsest supporting partition.
Proof.Suppose G has two distinct coarsest partitions P, P ′ of the universe U that support it, then Proposition 14 implies that the coarser partition E(P, P ′ ) also supports G.This is a contradiction.
We write SP(G) for the unique coarsest partition supporting G.For a partition P of U and a permutation σ ∈ Sym U , we write σP for the partition {σP | P ∈ P}.Note that this commutes with the operation E, so σE(P, P ′ ) = E(σP, σP ′ ).The next lemma shows how supporting partitions are affected by the conjugacy action of Sym U .
Lemma 16.If P is a partition supporting a group G, then for any σ ∈ Sym U , σP supports the group σGσ −1 .
Proof.Let π ∈ Stab U (σP) and let P be a part in P, then: where the second equality follows from the fact that π fixes σP .Thus, σ −1 πσ fixes P pointwise, therefore σ −1 πσ ∈ G and hence π ∈ σGσ −1 .This indicates how the unique coarsest supporting partition of a group translates under conjugation.
Proof.Immediate from Lemma 16 and the fact that the action of E commutes with σ.
We conclude that any group G is sandwiched between the pointwise and setwise stabilisers of SP(G).
Lemma 18.For any group G ⊆ Sym U , we have Proof.The first inclusion is by definition of supporting partitions.For the second, note that if σ ∈ G, then σGσ −1 = G.Then, by Lemma 17, σSP(G) = SP(G).
Note that these bounds need not be tight.For example, if G is the alternating group on U (or, indeed, any transitive, primitive subgroup of Sym U ), then SP(G) is the partition of U into singletons.In this case, Stab U (SP(G)) is the trivial group while Stab U {SP(G)} is all of Sym U .
We now use the bounds given by Lemma 18, in conjunction with bounds on G to obtain size bounds on SP(G).Recall that the index of |G| .The next lemma says that if P is a partition of [n] where the index of Stab n {P} in Sym n is sufficiently small then the number of parts in P is either very small or very big.
Lemma 19.For any ǫ and n such that 0 ≤ ǫ < 1 and Proof.Let p 1 ≤ p 2 ≤ . . .≤ p k be the respective sizes of the parts in P. Thus, Observe that, if By repeatedly applying this, we see that in the lower bound on s given by Equation (1), we can replace where the second inequality follows because n k = n n−k = n k ′ , and the third inequality follows from a simple combinatorial bound.Take the logarithm of both sides of the above equation to get log The definition of k ′ implies that k ′ ≤ n 2 and log n−log k ′ ≥ 1. Plugging this into Equation (2) gives that 4 log s ≥ k ′ .Take the logarithm of this inequality and apply the upper bound on s to determine that (1 − ǫ) log n + 2 ≥ log k ′ .Inserting this inequality back into Equation ( 2) log n .We use a similar argument to establish that, under the assumptions of the previous lemma, when the number of parts in P is small, then the largest part is very big.
Let ℓ ∈ N be such that Provided P contains more than one part both ℓ ∈ {0, 1} satisfy Equation (4).We may assume that p > 1 otherwise S ≤ |P| and we are done by Lemma 19.For any ℓ ≥ 1 satisfying Equation ( 4), redistributing weight from a p i to p j with i < j in a way similar to the proof of Lemma 19 gives the following, e ℓp e n−ℓ(p−1)+1 e ℓ+1 e n

=1
where the third inequality follows from Stirling's Formula, i.e., that for any x ≥ 2, ( x e x .Take the logarithm of the above equation to determine that where Equation ( 6) follows from Equation ( 5) since s ≥ n and ℓ ≥ 1, and Equation ( 7) follows from Equation ( 6) because p is the size of the second largest part of P and hence p ≤ n 2 and (log n − log p) ≥ 1.Take the logarithm of Equation 7and use the bound on s to determine that log p ≤ log log s + 2 ≤ (1 − ǫ) log n + 2. Plug this bound into Equation ( 6) to get that 5  2 log s ≥ ℓp(ǫ log n − 2) − 3 2 ℓ log n.Using ǫ 2 log n ≥ 2 and dividing by log n,

Support Theorem
Here we leverage the two combinatorial lemmas of the last subsection to show that in symmetric circuits of polynomial size, each gate has a small supporting partition, and hence has a small support.
Let g be a gate in a symmetric circuit C over universe U , from now on, we abuse notation and write SP(g) for SP(Stab U (g)).Note that, if P is any part in SP(g), then U \ P is a support of g in the sense of Definition 11.We write SP(g) to denote the smallest value of |U \ P | over all parts P in SP(g).Also, let SP(C) denote the maximum of SP(g) over all gates g in C.
By the orbit-stabiliser theorem, |Orb(g . Then, by Lemma 20, g has a support of small size provided that (i) s is sub-exponential, and (ii) SP(g) has fewer than n/2 parts.Thus, to prove our main technical theorem, which formalises Theorem 3 from the introduction, it suffices to show that if s is sufficiently sub-exponential, (ii) holds.
Theorem 21 (Support Theorem).For any ǫ and n with 2 3 ≤ ǫ ≤ 1 and n > 2 Proof.Suppose 1 ≤ s < n.C cannot have relational inputs, because each relational gate must have an orbit of size at least n, so each gate of C computes a constant Boolean function.The support of every gate g in C must be {U }, and hence 0 = SP(g) = SP(C).Therefore assume s ≥ n.
To conclude the theorem from Lemma 20 it suffices to argue that for all gates g, |SP(g)| ≤ n 2 .Suppose g is a constant gate, then, because g is the only gate with its label, it is fixed under all permutations and hence |SP(g If g is a relational gate, then it is fixed by any permutation that fixes all elements appearing in Λ(g) and moved by all others.Thus, SP(g) must contain singleton parts for each element of U in Λ(g) and a part containing everything else.Thus, if |SP(g)| > n 2 , SP(g) contains at least n 2 singleton parts, there is a contradiction using the bounds on s, n, and ǫ, s It remains to consider internal gates.For the sake of contradiction let g be a topologically first internal gate such that SP(g) has more than n 2 parts.Lemma 19 implies, along with the assumptions on s, n, and ǫ, Let H denote the children of g.Because g is a topologically first gate with |SP(g)| > n 2 , for all h ∈ H, SP(h) has at most n 2 parts.As before, we argue a contradiction with the upper bound on s.This done by demonstrating that there is a set of gate-automorphism pairs S = {(h, σ) | h ∈ H, σ ∈ Sym U } that are: (i) useful -the automorphism moves the gate out of the set of g's children, i.e., σh ∈ H, and (ii) independent -each child and its image under the automorphism are fixed points of the other automorphisms in the set, i.e., for all (h, σ), (h ′ , σ ′ ) ∈ S, σ ′ h = h and σ ′ σh = σh.Note that sets which are useful and independent contain tuples whose gate and automorphism parts are all distinct.The set S describes elements in the orbit of H with respect to Sym U .
Proof.Let R be any subset of S. Derive an automorphism from R: σ R := (h,σ)∈R σ (since automorphisms need not commute fix an arbitrary ordering of S).
Let R and Q be distinct subsets of S where without loss of generality Therefore each subset of S can be identified with a distinct element in Orb(H) and hence |Orb(H)| ≥ 2 |S| .Thus to reach a contradiction it suffices to construct a sufficiently large set S of gateautomorphism pairs.To this end, divide U into ⌊ |U| k ′ +2 ⌋ disjoint sets S i of size k ′ + 2 and ignore the elements left over.Observe that for each i there is a permutation σ i which fixes U \S i but σ i moves g, because otherwise the supporting partition of g could be smaller (n − (k ′ + 2) + 1).Since g is moved by each σ i and C is rigid, there must be an associated child h i ∈ H with σ i h i ∈ H. Thus let (h i , σ i ) be the gate-automorphism pair for S i , these pairs are useful.Let Q i be the union of all but the largest part of SP(h i ).Observe that for any σ which fixes Q i pointwise σ also fixes both h i and σ i h i , simply by the definition of support.
Define a directed graph K on the sets S i as follows.Include an edge from S i to S j , with i = j, if Q i ∩S j = ∅.An edge in K indicates a potential lack of independence between (h i , σ i ) and (h j , σ j ), and on the other hand if there are no edges between S i and S j , the associated pairs are independent.Thus it remains to argue that K has a large independent set.This is possible because the out-degree of S i in K is bounded by log n as the sets S i are disjoint and Lemma 20 can be applied to h i .Thus the average total degree (in-degree + out-degree) of K is at most 9k ′ .Greedily select a maximal independent set in K by repeatedly selecting the S i with the lowest total degree and eliminating it and its neighbours.This action does not effect the bound on the average total degree of K and hence determines an independent set I in K of size at least where the first inequality follows by expanding the floored expression, the second follows because k ′ < n 2 , the third follows from the lower bound on n, and the last follows because k ′ ≥ 1 as it is the ceiling of a positive non-zero quantity by definition.
Take S := {(h i , σ i ) | S i ∈ I}.By the argument above S is useful and independent.By Claim 22, conclude that s 2 for all g ∈ C and the proof is complete by Lemma 20.Observe that when s is polynomial in n the support of a rigid symmetric circuit family is asymptotically constant.This is the case for polynomial-size families.
Corollary 23.Let C be a polynomial-size rigid symmetric circuit family, then SP(C) = O(1).

Translating Symmetric Circuits to Formulas
In this section, we deploy the support theorem to show that P-uniform families of symmetric circuits can be translated into formulas of fixed-point logic.As a first step, we argue in Section 4.1 that we can restrict our attention to rigid circuits, by showing that every symmetric circuit can be converted, in polynomial time, into an equivalent rigid symmetric circuit.In Section 4.2 we show that there are polynomial-time algorithms that will determine whether a circuit is symmetric and, if so, compute for every gate its coarsest supporting partition and therefore its canonical support.In Section 4.3 we give an inductive construction of a relation that associates to each gate g of C a set of tuples that when assigned to the support of g result in g being evaluated to true.This construction is turned into a definition in fixed-point logic in Section 4.4.

Rigid Circuits
We first argue that rigid circuits uniquely induce automorphisms.
Proof of Proposition 9. Let σ ∈ Sym U induce the automorphisms π, π ′ of C. We show πg = π ′ g for all gates g in C, and hence π = π ′ .
Observe that if g is an output gate, the image of g under any automorphism induced by σ must be Ω(σΩ −1 (g)), because Ω is a function, and hence πg = π ′ g is unique and completely determined by σ.Therefore assume that g is not an output gate.We proceed by induction on the height of g to show that πg = π ′ g.
In the base case g is an input gate.If g is a constant gate, g is the only constant gate of its type and hence all automorphisms of C must fix it.If g is a relational gate, g is the only relational gate with its type Σ(g) and label Λ(g) and it must map to the similarly unique gate with type Σ(g) and tuple σΛ(g) and hence πg = πg ′ .
In the induction step g is an internal gate.By rigidity of C, g is unique for its children and type.Moreover, by induction the children of g map in the same way under π and π ′ , and hence the image of g must be the same in both automorphisms.Thus πg = π ′ g for all gates of C.
To see that any symmetric circuit can be transformed in polynomial time into an equivalent rigid symmetric circuit, observe that we can proceed inductively from the input gates, identifying gates whenever they have the same label and the same set of children.This allows us to establish the following lemma.
Lemma 24.Let C = G, W, Ω, Σ, Λ be a (B, τ )-circuit with universe U .There is a deterministic algorithm which runs in time poly(|C|) and outputs a rigid (B, τ )-circuit C ′ with gates G ′ = G such that for any g ∈ G, any input τ -structure A and any bijection Proof.Partition the gates G into equivalence classes where gates in the same class have the same labels, output markings, and children.If C is rigid every class has size one, otherwise there is at least one class containing two gates.
Let E be a minimum height equivalence class containing at least two gates.Order the gates in E: g 1 , g 2 , . . ., g |E| .For each gate f ∈ G\E, let c f denote the number of wires from E to f , and note that c f ≤ |E|.For all gates in E remove all outgoing wires.For all gates E\{g 1 }: (i) remove all input wires, and (ii) set their operation to AND.For each i, 1 ≤ i ≤ |E| − 1, add a wire from g i to g i+1 .For each f ∈ G\E and i ∈ [|E|], add a wire from g i to f if c f ≤ i.This completes the transformation of the gates in E.
We now argue that this does not effect the result computed at any gate g.First observe that no output gates appear in E, because Ω is injective and hence each output gate must be the sole member of its equivalence class.All gates in E originally had identical sets of children and labels and hence they must have evaluated to the same value.The modifications made do not change this property as g 1 computes the value it originally would have, then passes this value to the other gates in E, along a chain of single input AND gates.The modifications to the outgoing wires of E insure that each gate that originally took input from E has the same number of inputs from E (each with the same value) in the modified circuit.Taken together this means that the result computed at any gate in the modified circuit is the same as that computed at that gate in C.
We next argue that the local modification of E makes strict progress towards producing a rigid circuit C ′ .The local modification of E can only change equivalence classes above E because the changes to the output wires of E are the only thing that can possibly effect other equivalence classes.After the modification all gates in E must be in singleton equivalence classes because each gate in E is designed to have a unique set of children.
Greedily applying the above local modification simultaneously to all topologically minimal non-singleton equivalence classes of C, until none remain, produces a rigid circuit C ′ that computes the same query as C, because, as we have just argued, equivalence classes cannot grow as a result of this local modification.Moreover, this must happen after at most |C| many local modifications, because the number of equivalence classes is at most |C|.
We now show that this transformation preserves symmetry.Suppose C is symmetric.Fix any permutation σ ∈ Sym U .Let π be an automorphism induced by σ on C. Observe that any induced automorphism on C must map equivalence classes to equivalence classes because labels and children are preserved.It is easy to translate π into an induced automorphism of C ′ .Let E and E ′ be two equivaluence classes such that πE = E ′ where g 1 , . . ., g |E| and g ′ 1 , . . ., g ′ |E ′ | are the ordering of the gates in E and E ′ in C ′ .It can be argued by induction that mapping g i to g ′ i for all 1 ≤ i ≤ |E| = |E ′ | preserves all labels and wires and hence is an induced automorphism of σ in C ′ .Since σ is arbitrary, we conclude that the resulting circuit is symmetric.
The construction of equivalence classes and, indeed, the overall construction of C ′ can be easily implemented in time polynomial in |C| when given the circuit in a reasonable binary encoding.Finally, as gates are only being rewired and relabelled, G = G ′ .

Computing Supports
By Lemma 24, we know that there is a polynomial-time algorithm that converts a circuit into an equivalent rigid circuit while preserving symmetry.In this subsection we show how to, in polynomial time, check whether the resulting circuit is symmetric, and if it is, compute the support of each gate.To this end we first describe an algorithm for determining induced automorphisms of a rigid circuit.
Proof.Process the gates of C recursively building up a mapping π.Compute the mapping for the children of a gate g before determining the mapping for g.If at any point an image for g cannot be located, halt and output that there is no induced automorphism.
Let g be a constant gate, then g is fixed under every automorphism.Let g be a relational gate, then there is at most one gate g ′ in C with Σ(g) = Σ(g ′ ), σΛ(g) = Λ(g ′ ), and σΩ −1 (g) = Ω −1 (g ′ ).If g ′ exists, set πg to g ′ , otherwise halt with failure.Similarly, when g is an internal gate use Λ, Ω, and the action of π on the children of G (via W ) to determine a unique image of g, if it exists.
By Proposition 9 if σ induces an automorphism of C, it is unique and will be discovered by the above algorithm.This algorithm clearly runs in time polynomial in |C|.
Using the preceding lemma we can determine whether a given rigid circuit is symmetric by computing the set of automorphisms induced by transpositions of the universe.If an induced automorphism fails to exist the circuit cannot be symmetric.Otherwise, it must be symmetric because such transpositions generate the symmetric group.If the circuit is symmetric, the coarsest supporting partitions and orbits of each gate can be determined by examining the transitive closure of the action of the automorphisms induced by transpositions on the universe and the gates, respectively.
Lemma 26.Let C be a rigid (B, τ )-circuit with universe U .There is a deterministic algorithm which runs in time poly(|C|) and decides whether C is symmetric.If C is symmetric the algorithm also outputs the orbits and coarsest supporting partitions of every gate.
Proof.For all transpositions (uv) ∈ Sym U run the algorithm of Lemma 25 to determine the unique automorphism π (uv) of C induced by (uv), if it exists.Output that C is symmetric iff every induced automorphism π (uv) exists.This is correct because the set of transpositions generates all of Sym U , and therefore the automorphisms π (uv) generate all induced automorphisms of C.
If C is symmetric, these induced automorphisms also indicate the supporting partitions and orbits of each gate g.Let P (uv) := {{u, v}} ∪ w∈U\{u,v} {{w}} be a partition of U .Note that π (uv) fixes g iff P (uv) supports g.Let P be the partition determined by combining the partitions P (uv) which support g using E. Proposition 14 implies that P supports g.Suppose P is not the coarsest partition supporting g.Then, there exists u, v ∈ U which are not in the same part of P but in the same part of some partition supporting g.But by the definition of P, π (uv) cannot fix g-a contradiction.Therefore P is the coarsest partition supporting g.
To compute the orbit of a gate g: Start with S 0 := {g}, and for i ≥ 0, compute S i+1 := S i ∪ (uv)∈Sym U π (uv) S i .Let S be the least fixed point of this process.We argue that S = Orb(g).S ⊆ Orb(g), because it consists of gates reachable from g via a sequence of induced automorphisms of C. S ⊇ Orb(g), because the set of automorphisms induced by transpositions generate the the group of all induced automorphisms.
Since there are only |U| 2 transpositions, and we can determine whether there is an induced automorphism for each transposition in time poly(|C|) and hence determine whether C is symmetric in time poly(|C|).If C is symmetric the computation of the supports and orbits of all gates also is computed in time poly(|C|) because each output is completely determined by the equivalence classes induced by the relations defined by the induced automorphisms π (uv) .Therefore the overall algorithm runs in time poly(|C|).

Succinctly Evaluating Symmetric Circuits
Let C = (C n ) n∈N be a family of polynomial-size rigid symmetric circuits computing a q-ary query.Let n 0 be a constant sufficient to apply the Support Theorem to C n for n ≥ n 0 and fix such an n.By Theorem 21, there is a constant bound k so that for each gate g in C n the union of all but the largest part of the coarsest partition supporting g, SP(g), has at most k elements.Moreover, this union is a support of g in the sense of Definition 11.We call it the canonical support of g and denote it by sp(g).In this subsection we show that how a gate g evaluates in C n with respect to a structure A depends only on how the universe U of the structure is mapped to the canonical support of g.This allows us to succinctly encode the bijections which make a gate true (first as injective partial functions and then as tuples).This ultimately lets us build a fixed-point formula for evaluating C n -indeed, all symmetric circuits-in the next subsection.
For any set X ⊆ [n], let U X denote the set of injective functions from X to U .Let X, Y ⊆ [n] and α ∈ U X , β ∈ U Y , we say α and β are consistent, denoted α ∼ β, if for all z ∈ X ∩ Y, α(z) = β(z), and for all x ∈ X\Y and y ∈ Y \X, α(x) = β(y).Recall that any bijection γ : U → [n] determines an evaluation of the circuit C n on the input structure A which assigns to each gate g the Boolean value C n [γA](g).(Note that γ −1 ∈ U [n] .)Let g be a gate and let Γ(g) := {γ | C n [γA](g) = 1} denote the set of those bijections which make g evaluate to 1.The following claim proves that the membership of γ in Γ(g) (moreover, the number of 1s input to g) depends only on what γ maps to sp(g).
Claim 27.Let g be a gate in Proof.There is a unique permutation π ∈ Sym n such that γ 1 = πγ 2 .Moreover, π fixes sp(g) pointwise, since γ −1 1 and γ −1 2 are consistent with α.Since C n is rigid and symmetric, π is an automorphism of C n , and we have that Since π fixes g, π fixes H setwise.As this establishes a bijection between the children H that evaluate to 1 for γ 1 and γ 2 , we conclude part 2.
We associate with each gate g a set of injective functions EV g ⊆ U sp(g) defined by EV g := {α ∈ U sp(g) | ∃γ ∈ Γ(g) ∧ α ∼ γ −1 } and note that, by Claim 27, this completely determines Γ(g).We can use the following claim to recursively construct EV g for all gates in C.
Claim 28.Let g be a gate in C with children H. Let α ∈ U sp(g) , then for all γ : U → where for h ∈ H, A h := {β ∈ U sp(h) | α ∼ β}.
Proof.We have, where the first equality follows from Claim 27 Part 2, the second by linearity of addition (note that |{δ −1 ∈ Γ(h)}| ∈ {0, 1}), the third by the definitions of ∼ and A h , and the fourth by the definition of EV h .Observing that |{δ ∈ U Note that implicit in the claim is that the r.h.s.side of ( 8) is integral.Since [n] is linearly ordered, X ⊆ [n] inherits this order and we write X for the ordered |X|-tuple consisting of the elements of X in the inherited order.For α ∈ U X we write α ∈ U X to indicate the tuple α( X).Observe that this transformation is invertible.This allows us to succinctly encode such injective functions as tuples over U and, further, to write relational analogs of the sets of injective functions we considered before, e.g., EV g := { α | α ∈ EV g }.Using Claim 28 is it easy to recursively define EV g over C n .
• Let g be a relational gate with Σ(g) = R ∈ τ , then sp(g) is the set of elements in the tuple Λ R (g).By definition we have • Let Σ(g) = AND and consider α ∈ U sp(g) .By Claim 28, α ∈ EV g iff A h = EV h for every child h of g, i.e., for every child h and every β ∈ U sp(h) with α ∼ β, we have β ∈ EV h .
• Let Σ(g) = OR and consider α ∈ U sp(g) .By Claim 28, α ∈ EV g iff there is a child h of g where A h ∩ EV h is non-empty, i.e., for some child h of g and some β ∈ U sp(h) with α ∼ β, we have β ∈ EV h .
• Let Σ(g) = NOT and consider α ∈ U sp(g) .The gate g has exactly one child h.Claim 28 implies that α ∈ EV g iff A h = EV h , i.e., for some β ∈ U sp(h) with α ∼ β, we have β ∈ EV h .
• Let Σ(g) = MAJ and consider α ∈ U sp(g) .Let H be the set of children of g and let A h := {β ∈ U sp(h) | β ∼ α}.Then Claim 28 implies that α ∈ EV g if, and only if, From EV we can recover the q-ary query Q computed by C n on the input structure A because the support of an output gate g is exactly the set of elements in the marking of g by Λ Ω .In particular: For Boolean properties q = 0, and Q = { } indicates that A has the property and Q = ∅ indicates that it does not.

Translating to Formulas of FP
Let C = (C n ) n∈N be a P-uniform family of symmetric (B, τ ) circuits, where B is either B std or B maj .Our aim is to show that there is a formula Q of FP, or FPC in the case of B maj , in the vocabulary τ ⊎ {≤} such that for any n and τ -structure A over a universe U with |U | = n, the q-ary query defined by C n on input A is defined by the formula Q when interpreted in the structure A ≤ := A ⊎ [n], ≤ .Since C is P-uniform, by the Immerman-Vardi theorem and Lemma 24, we have an FP interpretation defining a rigid symmetric circuit equivalent to C n -that we also call C nover the number sort of A ≤ , i.e., a sequence Φ := (φ G , φ W , φ Ω , (φ s ) s∈B⊎τ ⊎{0,1} , (φ ΛR ) R∈τ ) of formulas of FP(≤) that define the circuit when interpreted in [n], ≤ .Note that C n is defined over the universe [n].Let t be the arity of the interpretation, i.e., φ G defines a t-ary relation G ⊆ [n] t .If n is less than n 0 , the length threshold for applying the support theorem, C n can be trivially be evaluated by a FP formula which quantifies over all (constantly-many) bijections from the point sort of A ≤ to the number sort of A ≤ and then directly evaluates the circuit with respect to the bijection.Thus we only need to consider the case when n ≥ n 0 , and are able to use the recursive construction of EV from the last subsection along with a constant bound k on the size of the gate supports in C n .
A small technical difficulty arises from the fact that we want to define the relation EV g inductively, but these are actually relations of varying arities, depending on the size of sp(g).For the sake of a uniform definition, we extend EV g to a k-ary relation for all g by padding it with all possible values to obtain tuples of length k.
if, and only if, a ∈ EV g .Our aim is to show that the relation V is definable by a formula of FP.Throughout this subsection we use µ and ν to indicate t-tuples of number variables which denote gate indexes in [n] t , and use the k-tuples of point variables x = (x 1 , . . ., x k ) and y = (y 1 , . . ., y k ) to denote injective functions that have been turned into tuples and then padded.
By Lemma 26 and invoking the Immerman-Vardi theorem again, we have a formula supp such that [n], ≤ |= supp[g, u] if, and only if, [n], ≤ |= φ G [g] (i.e., g is a gate of C n as defined by the interpretation Φ) and u is in sp(g).We use supp to define some additional auxiliary formulas.First we define, for each i with 1 ≤ i ≤ k a formula supp i such that [n], ≤ |= supp i [g, u] if, and only if, u is the i th element of sp(g).These formulas can be defined inductively as follows, where η is a number variable We now define a formula agree(µ, ν, x, y) so that for a structure A, A ≤ |= agree[g, h, a, b] if, and only if, α ∼ β for α ∈ U sp(g) , β ∈ U sp(h) that are the restrictions of the k-tuples a and b to the length of sp(g) and sp(h) respectively.agree(µ, ν, x, y) := 1≤i,j,≤k With these, we now define a series of formulas (θ s ) s∈B⊎τ ⊎{0,1} (µ, x) corresponding to the various cases of the construction of the relation EV g from Section 4.3.In these, V is a relational variable for the relation being inductively defined.
To define θ MAJ we start with some observations.We wish to formalise Equation 10, but there are a few complications.The relation k-ary EV h we are defining inductively is the result of padding EV h with all tuples of k − |sp(h)| distinct elements.Thus the number of elements in EV . Similarly, for any fixed g, h and a, if we write A h for the set of tuples b satisfying agree(g, h, a, b), then . Finally, the tuples in A h ∩ EV h are exactly those obtained by padding tuples in A h ∩ EV h to length k and there are therefore and it suffices to compute the latter.For any fixed i and j with 0 ≤ i ≤ j ≤ k, define the formula overlap ij (µ, ν) so that A ≤ |= overlap ij [g, h] iff |sp(h)| = j and |sp(g) ∩ sp(h)| = i.This formula can be defined in FO.
Using k-tuples of number variables in FPC we can represent natural numbers less than n k .We assume, without giving detailed construction of the formulas involved, that we can define arithmetic operations on these numbers.In particular, we assume we have for each i, j as above a formula asize ij (µ, ξ), with ξ a k-tuple of number variables, such that A ≤ |= asize ij [g, e] iff e = |A h | for any gate h with |sp(h)| = j and |sp(g) ∩ sp(h)| = i.
Using this, we define the formula num ij (µ, x, ξ), with ξ a k-tuple of number variables, so that A ≤ |= num ij [g, a, e] iff e is the number of gates h with A ≤ |= overlap ij [g, h] which are made true by some bijection that assigns the tuple a to sp(g).This formula is given by Now we can define the required formula θ MAJ by where the sum inside the formula is to be understood as shorthand for taking the sum over the bounded number of possible values of i and j.
proofs actually show that these properties are not even definable in the infinitary logic with a bounded number of variables and counting (C ω ∞ω -see [8]).Since it is not difficult to show that formulas of FPC + Υ can be translated into C ω ∞ω , we have the following.
Corollary 31.Hamiltonicity and 3-colourability of graphs are not decidable by families of P/poly-uniform symmetric majority circuits.

Coherent and Locally Polynomial Circuits
In this section we discuss connections with the prior work of Otto [9].Otto studies rigid symmetric Boolean circuits deciding Boolean properties of structures and gives uniformity conditions on such families that characterise bounded-variable fragments of finite and infinitary first-order logic.The second property is locally polynomial; informally, a circuit family is locally polynomial if the size of the orbit of every wire is polynomially bounded.
Definition 33 (Locally Polynomial).A rigid circuit family (C n ) n∈N is locally polynomial of degree k if there is a k ∈ N such that each C n and every subset S ⊆ [n], the size of the orbit of every wire with respect to the automorphisms of the circuit induced by Sym S at most |S| k .
The main result of [9,Theorem 6] establishes an equivalence between coherent locallypolynomial (of degree k) families of rigid symmetric (B std , τ )-circuits computing Boolean functions on fin[τ ] and infinitary first-order logic with k variables.It should be noted that in Otto's definition of circuit families the individual circuits in the family may themselves be infinite, as the only size restriction is on the orbits of gates.The theorem also shows that if the circuit families are also constant depth they correspond to the fragment of first-order logic with k variables.
The common restriction of notions of uniformity we consider in this paper is that the circuits have size polynomial in their input length.If we restrict ourselves to locally-polynomial coherent symmetric families where the individual circuits are finite, we can use the Support Theorem (Corollary 23) to establish a direct connection with polynomial-size symmetric circuit families, formally stated in the following proposition.
Proposition 34.Let C := (C n ) n∈N be a family of rigid symmetric Boolean circuits.
1.If C is a locally-polynomial coherent family, then C is polynomial size.
2. If C is polynomial size, then C is locally polynomial.
Proof.We prove the two parts separately.Part 2. If C has polynomially many gates then the Support Theorem immediately implies that the supports of all gates in C is bounded by some k ∈ N. Therefore for every S ⊆ [n] and every wire in C n ∈ C has its orbit size bounded by |S| 2k .This is exactly the definition of locally polynomial.
Since there are properties in an infinitary logic with finitely many variables that are not decidable by polynomial-size circuits, it follows from the above proposition that the use of infinite circuits is essential in Otto's result.
Proposition 34 implies that all uniform circuit families we consider are locally polynomial.However, it does not establish an equivalence between a circuit family having polynomially many gates and being locally polynomial and coherent.Indeed there are Boolean circuit families uniformly definable in FO + ≤ that are not coherent.To see this observe that such circuit families may include gates that are completely indexed by the number sort and hence are fixed under all automorphisms induced by permutations of the point sort.Moreover the number of such gates may increase as a function of input length.However, because coherence requires that complete embedding exist, the number of gates in each circuit of a coherent family that are not moved by any automorphism must be identical.Thus there are uniform circuits that are not coherent.
Consider weakening the definition of coherence to require only that an embedding exists but not that the embedding is complete, and call this partial coherence.One can show that any relation which can be computed by a Boolean circuit family uniformly definable in FO + ≤ can also be computed by a partially coherent Boolean circuit family with the same uniformity by appropriately creating copies of circuits relativised for all shorter lengths.We omit any formal discussion of this construction.

Future Directions
One of the original motivations for studying symmetric majority circuits was the hope that they had the power of choiceless polynomial time with counting (CPTC) [1], and that, perhaps, techniques from circuit complexity could improve our understanding of the relationship between CPTC and the invariant queries definable in polynomial-time.However, because FPC CPTC [4], our results indicate that symmetry is too much of restriction on P-uniform circuit families to recover CPTC.
A natural way to weaken the concept of symmetry is to require only that induced automorphisms exist only for a certain subgroup of the symmetric group.This interpolates between our notion symmetric circuits and circuits on linearly-ordered structures, with the latter case occurring when the subgroup is the identity.An easier first step may be to consider the action on structures with a finite number of disjoint sorts and require only that automorphisms be induced by permutations which preserve the sorts, e.g., structures interpreting Boolean matrices whose rows and columns are indexed by disjoint sets.
The Support Theorem is a fairly general statement about the structure of symmetric circuits and is largely agnostic to the particular semantics of the basis.To that end the Support Theorem may find application to circuits over bases not consider here.The Support Theorem can be applied to arithmetic circuits computing invariant properties of matrices over a field; e.g., the Permanent polynomial is invariant and one standard way to compute it is as a symmetric arithmetic circuit, i.e., Ryser's formula [10].Finally, the form of the Support Theorem can, perhaps, be improved as the particular upper bound required on the orbit size does not appear to be fundamental to the conclusion of the Support Theorem.

Lemma 20 .
For any ǫ and n such that 0 ≤ ǫ < 1 and log n ≥ 8 ǫ 2 , if P is a partition of [n] with |P| ≤ n 2 , s := [Sym n : Stab n {P}] and n ≤ s ≤ 2 n 1−ǫ , then P contains a part P with at least n − 33 ǫ • log s log n elements.Proof.The initial setup is the same as in the proof of Lemma 19.Let p 1 ≤ p 2 ≤ . . .≤ p k be the respective sizes of the parts in P and let S := k−1 i=1 p i .Our aim is to show that S ≤ 33 ǫ • log s log n .Denote the size of the second largest part by p := p k−1 .We have

Part 1 .
Suppose to the contrary that C n has s(n) = ω(poly(n)) gates.Because C is locally polynomial the Support Theorem gives a bound k ∈ N on the size of the support of gates in C. Take m ∈ N such that C m is a circuit such that C k completely embeds into C m and s(k) • m k < s(m), such m exists because C is coherent and s is super polynomial.By symmetry and averaging there are at least s(m) m k gates of C m whose supports are drawn from [k].These gates are necessarily fixed by Sym [m]\[k] .Since the embedding is complete, C k maps onto at least these gates.But this is a contradiction because s(k) < s(m) m k .Thus C has polynomially many gates.
Observe that | A h | and |A h | are completely determined by |sp(g)|, |sp(h)| and |sp(g) ∩ sp(h)|.We avoid dealing explicitly with fractions by noting that for any gate h, the sum h ′ ∈Orb(h) | A h ′ ∩ EV h ′ | | A h ′ |is an integer (by an argument analogous to Claim 28).Since |A h ′ | is the same for all h ′ ∈ Orb(h), it suffices to compute the sum of |A h ′ ∩ EV h ′ | for all h ′ with a fixed size of |A h | and then divide the sum by |A h |.This is what we use to compute the sum on the l.h.s. of Equation 10.
Otto defines two properties to establish his notion of uniformity.The first is called coherence; informally, a circuit family (C n ) n∈N is coherent if C n appears as a subcircuit of all but finitely many of the circuits at larger input lengths.Definition 32 (Coherence).Let C := (C n ) n∈N be a family of rigid symmetric (B std , τ )circuits computing a Boolean function.The circuit C n embeds into the circuit C m with m > n if there is a subcircuit of C m which is isomorphic to C n .An embedding is complete if its images are exactly those gates of C m which are fixed by Sym [m]\[n] .The circuit family C is coherent if for each n ∈ N, C n completely embeds into C m for all large enough m > n.