Design and Implementation of Software Filtering Algorithm Based on FPGA

Abstract

With the development of electronic technology, in the actual software design process, the use of FPGA is often related to this. External interference pulses or block signals will affect stability, so to prevent software from making erroneous actions, input signals must be filtered. The software filtering algorithm is an important part of the software pre-processing process. The FPGA-based software filtering algorithm provides a higher level of parallel processing than the software algorithm. Meet real-time software processing requirements and have flexible hardware programming functions. Based on the existing filtering algorithm and maximizing the use of the hardware resources of the system, a new software filtering algorithm design method based on FPGA is recommended. Compared with the traditional method, this method greatly improves the processing speed of the system and guarantees the real-time requirements. It can be applied to occasions with high real-time requirements. FPGA has powerful parallel capabilities and flexible implementation methods. The purpose of this paper is to implement a software filtering algorithm based on the FPGA hardware platform. By reducing the complexity of the software filtering algorithm, optimizing the hardware structure, increasing the operating speed, and rationally using hardware resources, under the premise of ensuring the filtering performance, design a fast calculation speed, Software filtering algorithm with less hardware resource occupation and reliable performance.