FRed : Conditional Model Checking via Reducers and Folders

. There are many hard veriﬁcation problems that are currently only solvable by applying several veriﬁers that are based on complementing technologies. Conditional model checking (CMC) is a successful solution for cooperation between veriﬁcation tools. In CMC, the ﬁrst veriﬁer outputs a condition describing the state space that it successfully veriﬁed. The second veriﬁer uses the condition to focus its veriﬁcation on the unveriﬁed state space. To use arbitrary second veriﬁers, we recently proposed a reducer-based approach. One can use the reducer-based approach to construct a conditional veriﬁer from a reducer and a (non-conditional) veriﬁer: the reducer translates the condition into a residual program that describes the unveriﬁed state space and the veriﬁer can be any oﬀ-the-shelf veriﬁer (that does not need to understand conditions). Until now, only one reducer was available. But for a systematic investigation of the reducer concept, we need several reducers. To ﬁll this gap, we developed FRed , a Framework for exploring diﬀerent REDucers. Given an existing reducer, FRed allows us to derive various new reducers, which diﬀer in their trade-oﬀ between size and precision of the residual program. For our experiments, we derived seven diﬀerent reducers. Our evaluation on the largest and most diverse public collection of veriﬁcation problems shows that we need all seven reducers to solve hard veriﬁcation tasks that were not solvable before with the considered veriﬁers.


Introduction
Due to the undecidability of software verification, even after more than 40 years of research on automatic software verification [31], some hard verification tasks cannot be solved by a single verifier alone. To increase the number of solvable tasks, one needs to combine the strengths of distinct verifiers. Several combinations [3,8,9,20,23,25,32,33,37] were proposed in the literature. One promising combination is conditional model checking (CMC) [9], which unlike others does not modify the programs nor let the combined techniques know each other.  CMC works as follows: If the first verifier gives up on the verification task, it outputs a condition that describes the state space that it successfully verified. The (conditional) second verifier uses the condition of the first verifier to focus its work on the still-unverified state space. Note that one can easily extend the CMC approach to more than two verifiers by letting all verifiers generate conditions. To easily construct conditional verifiers (i.e., verifiers that understand conditions) from existing off-the-shelf verifiers, a recent work proposed the concept of reducer-based CMC [13]. Instead of making a verifier aware of conditions, reducer-based CMC constructs a conditional verifier from an existing verifier by plugging a reducer in front of the verifier. The reducer is a preprocessor that given the original program and the condition as input, translates the condition into a (residual) program, a format that is understandable by classic verifiers.
The construction of a reducer, especially proving its soundness, is complex and so far there exists only one reducer. However, this reducer's translation is very precise, and therefore, may construct programs that are orders of magnitudes larger than the original program. To solve this problem, and to support systematic experimentation with different reducers, we propose the formal framework FRed, which streamlines and simplifies the construction of new reducers from existing ones. Its underlying idea is to construct a new reducer r = F • R, a so-called fold reducer, by sequentially composing an existing reducer R with a folder F . A folder uses a heuristic that specifies how to modify the program constructed by the existing reducer. More concretely, a folder defines which program locations of the program constructed by the existing reducer are collapsed into a new location and, thus, specifies how to coarsen the program. However, to avoid false alarms, the specified coarsening must not add new program behavior.
New conditional verifiers CV can be constructed with FRed according to the equation CV = V • (F • R), where r = (F • R) is the fold-reducer composed of the existing reducer R and a folder F , V is an arbitrary verifier, and • is the sequential composition operator. Figure 1 illustrates this construction in the context of reducer-based CMC. We used this construction to build 49 conditional verifiers, which use the already existing reducer, one of seven folders, and one of seven verifiers. Our large experimental study revealed that using several reducers (with different folders) can make the overall verification more effective. Contributions. We make the following contributions: -We introduce FRed, a framework for the composition of new reducers from existing reducers and folding heuristics.
i=i+i; else 6 i=-1; 7 -We prove that FRed derives valid reducers in case the existing reducer is valid and the folding heuristic adheres to a correctness constraint. -We use our framework FRed to derive seven new reducers from the existing reducer ParComp [13] and use them in various conditional verifiers. -We experimentally show that the overall effectiveness of reducer-based CMC can be increased using various reducers. -Our reducers and all experimental data are available for replication and to construct further conditional model checkers (see Sect. 6).

Background
Program Representation. Following the literature [8,10], we model a program by a control-flow automaton (CFA) C = (L, 0 , G) consisting of a set L of locations, an initial location 0 ∈ L, and a set of control-flow edges G ⊆ L × Ops × L. The set Ops describes all possible operations. In our presentation, we only consider operations on integer variables that are either boolean expressions (so called assume operations) or assignments. However, our implementation supports C programs. In the following, we use L for the superset of all location sets and C for the set of all CFAs. A CFA C = (L, 0 , G) is deterministic (i.e., representable as a C program) if for all control-flow edges ( , op 1 , 1 ), ( , op 2 , 2 ) ∈ G either op 1 = op 2 and 1 = 2 , or op 1 and op 2 are assume operations with op 1 ≡ ¬op 2 . The left of Fig. 2 shows our example program absPow, which computes f (N ) = 2 log 2 |N | for N = 0 and e.g., ensures the property f (N ) = 0. Next to program absPow, its deterministic CFA is shown, which contains one edge per assignment and two edges for each condition of an if-or while-statement. The two edges per if-or while-statement are labeled with the condition and its negation and represent the two evaluations of the condition.
Program Semantics. We use an operational semantics and represent a program's state by a pair of location (the value of the program counter) and concrete data state c. In our representation, a concrete data state is a mapping from the program variables into the set of integer values. Now, a concrete path π of a CFA C = ( and SP is the strongest-post operator of the semantics. We let paths(C) be the set of all concrete paths of a CFA C. Given a concrete path π = ( 0 , c 0 ) g1 → · · · gn → ( n , c n ), we derive its execution ex(π) = c 0 c 1 . . . c n . Finally, we define ex(C) := {ex(π) | π ∈ paths(C)} to be the executions of a CFA C. Condition. After an (incomplete) verification run, a condition sums up which concrete paths of a program have been explored [9]. We model the condition as an automaton describing the syntactical program paths that have been verified and the assumptions that have been made on these paths (i.e., which concrete data states were included). Thus, the condition's edges are labeled by pairs of program edges and assumptions. We model assumptions as state conditions, letting Φ denote the set of all state conditions. Accepting states subsume explored paths, i.e., if a path's prefix is accepted by the condition, the path has been explored. Non-explored paths either end in a non-accepting state or more often have a prefix that ends in a state q from which no further transition is applicable. Typically, the latter means that the verifier did not explore beyond the prefix.
The automaton on the right of Fig. 2 shows a condition for our example program absPow. For the sake of presentation, we left out the assumptions, which are all true. The condition states that the else-branch of the outermost if-statement was explored and that the verifier performed a BFS alike exploration of the if-branch, which split the exploration of the inner if-branch and which is interrupted after one loop unrolling. Formally, a condition is defined as follows. 3 Definition 1. A condition A = (Q, Σ, δ, q 0 , F ) consists of a finite set Q of states, an initial state q 0 ∈ Q, and accepting states F ⊆ Q, an alphabet Σ ⊆ 2 G × Φ, and a transition relation δ ⊆ Q × Σ × Q with ¬∃(q f , ·, q) ∈ δ : q f ∈ F ∧ q / ∈ F .
We let A be the set of conditions.
As already said, a condition describes which paths of a program have been looked at. The following definition formalizes this coverage property. Note that we use c |= ϕ to describe that a concrete data state c satisfies a state condition ϕ.
Reducer. The CMC approach suggests that after an incomplete verification run, a second verifier should use the produced condition to explore only the uncovered paths. However, many verifiers do not understand conditions. To overcome this problem, reducer-based CMC [13] suggests to extend verifiers with a preprocessing step that translates the condition into a residual program. A residual program may overapproximate those program paths that are not covered by the condition, but must not introduce additional program behavior. We follow reducer-based CMC [13] and use reducers to compute residual programs.
First, a reducer for a specific class of conditions was proposed [26]. Then, reducerbased CMC [13] generalized the first approach to use a reducer, named ParComp, which supports all kinds of conditions, and showed that it is indeed a reducer [13]. To compute a residual program, the reducer ParComp performs a parallel composition of the program and the condition. Starting in the initial location and initial condition state, it matches CFA edges with condition transitions that subsume the respective CFA edge. If no matching condition transition exists, ParComp switches to consider CFA edges only. Additionally, it stops exploring states containing a final state q ∈ F since the condition covers all longer paths.
However, the reducer ParComp has one drawback. Verifiers often unfold the program, e.g., unroll loops or inspect branches separately. Due to partially explored paths, some of the unfoldings become part of the condition and will be encoded in the residual program generated by ParComp. Thus, the residual program constructed by ParComp may become orders of magnitudes larger than the original program resulting in increased parsing costs for the second verifier. Additionally, a verifier v 2 analyzing the residual program generated by ParComp is forced to apply the same unfoldings on the non-covered paths as the condition-generating verifier v 1 . However, it might be more effective or efficient if verifier v 2 would less often (or never) unfold certain program structures of the original program. To tackle this problem, we present the framework FRed that extends reducers like ParComp to let them compute smaller residual programs with fewer unfoldings at the cost of adding more explored paths to the residual program, i.e., computing less precise residual programs.

FRed: Fold-Reducers from Reducers
To assist a systematic exploration of the reducer design space, we present the framework FRed. With FRed one can methodically derive new reducers from existing ones, thereby controlling the precision and size of the produced residual programs. One only needs to define how to compress the residual programs computed by the original reducer. Currently, FRed is limited to the class of path-preserving reducers. Path-preserving reducers have the advantage that they keep the reference to the original program within the syntactical structure of the residual program, i.e., except for location renaming they encode a subset of the syntactical paths of the original program. This makes it easier to derive new reducers from them. Next, we formally define a path-preserving reducer, where U is the universe of location markers (e.g., condition states).
Given a path-preserving reducer like ParComp, the goal of FRed is to derive new reducers that produce smaller, less precise residual programs. Our idea is that the new reducers aggregate certain similar behavior of the residual program C r produced by the given path-preserving reducer. So far, the framework FRed supports syntactical aggregations that unite location states of the program C r . These aggregations can be used to revert loop-unfoldings or separation of branches, the main cause for large residual programs. Additionally, these aggregations are simple to compute. One needs to define only a partitioning of C r 's location states into equivalence classes. However, to get proper reducers, the derived reducers must not introduce new program behavior. Transferred to our aggregations, this means that we must not combine location states of C r that refer to different locations of the original program. We introduce the concept of a location-consistent partitioner that computes partitions respecting this requirement.
We use P for the set of all location-consistent partitioners.
As examples, we consider the two extreme location-consistent partitioners cfa and sep as defined in the following. Partitioner cfa groups all elements with the same location and sep never groups elements.
All remaining location-consistent partitioners group subsets of elements with same locations. Often, they are context dependent, i.e., they take into account the structure of the original program or the program C r generated by the pathpreserving reducer. For instance, we use the following partitioner that combines locations referring to the same loop head in the original program. The partitioner is parameterized by the loop heads L of the original program.
A partioning of the nodes of a graph, e.g., a CFA, induces a coarser graph. Each set of nodes becomes a node of the new graph and there exists an edge between two sets of nodes if there exists an edge between two nodes in the original graph, one in each set. A folder applies this principle to compress a residual program computed by a path-preserving reducer. A location-consistent partitioner defines the partitioning of location states. Furthermore, the new initial program location is the set of location states that contains the original initial location. Due to the partitioner's properties, exactly one such set exists.
i=i+i; 10 while(i<N) 11 i=i+i; (e) LHBC, SEP We use folders to construct so called fold-reducers from an existing path-preserving reducer. To this end, we concatenate the path-preserving reducer with a folder.   (Fig. 2, right). The residual programs differ in their program size and structure. They were constructed by the seven different fold-reducers used in the evaluation, all of them using the reducer ParComp [13], but we converted them into a better readable form using proper if-and whilestatements instead of gotos. Note that for this example, some fold-reducers constructed the same residual program. To construct the residual programs in Figs. 3a and 3e, the partitioners cfa and sep could be used, respectively. For the residual program in Fig. 3b, we used partitioner lh L with L = { 4 }. The partitioner used to construct the program in Fig. 3c undoes unfoldings of ifstatements but keeps loop-unfoldings. Finally, the program in Fig. 3d is generated with a partitioner that allows loop-unfoldings up to a given bound of ten and then folds them. However, loop heads of the same iteration are always combined. Above, we used fold-reducers to compute residual programs. In general, we plan to use fold-reducers in the construction of conditional verifiers. Thus, we must show that fold-reducers are reducers. Syntactically, fold-reducers look like reducers. It remains to be shown that fold-reducers fulfill the residual property. Proof. We need to show that ex(C)\{ex(π) | A covers π} ⊆ ex(FoldRed ppr p (C, A)) ⊆ ex(C). Since ppr is reducer, ex(C) \ {ex(π) | A covers π} ⊆ ex(ppr (C, A)). Thus, it suffices to show that ex(ppr(C, A)) ⊆ ex(FoldRed ppr p (C, A)) ⊆ ex(C). In the following, let C = (L o , 0,o , G o ), ppr(C, A)) = (L r , 0,r , G r ), and FoldRed ppr p (C, A) = (L f , 0,f , G f ). Due to the requirements on p and the definition of the fold-reducer, there exists a unique function h : L r → L f with ∀ r ∈ L r : r ∈ h( r ) and h( 0,r ) = 0,f .
Part I) ex(ppr(C, A)) ⊆ ex(FoldRed ppr p (C, A)): In practice, arbitrary fold-reducers are unsatisfactory since they may produce nondeterministic CFAs, which cannot be translated to C programs. Figure 4 shows an example of a non-deterministic CFA generated by a fold-reducer. In the example, the non-determinism is caused by the partitioner lh { 4} , which only combines loop heads. Generally, also the condition may cause non-determinism. 4 To solve the non-determinism problem, we transform a fold-reducer into a deterministic fold-reducer that generates deterministic residual programs from deterministic, input programs. The basic idea is to adapt the partitioner to compute a coarser for Algorithm 1 shows how to compute such a coarser partitioning from the original partitioning. Starting with the original partitioning, it combines partitions of its current partitioning as long as there exist two CFA edges causing nondeterminism, i.e., they consider the same operation and start in the same partition element, but end in different partition elements.
Attentive readers already noticed that Alg. 1 uses the program C r generated by the path-preserving reducer to adapt the partitioning. Since multiple programs may consider the same set of location states but different control-flow edges, it is impossible to adapt the partitioner without knowledge of C r . Thus, a deterministic fold-reducer must use different adaptions of the partitioner p. The correct adaption depends on the input program and the path-preserving reducer. We use the following adaption, which depends on the original program and the path-preserving reducer ppr used by the fold-reducer. The adapted partitioner returns the partitioning computed by the original partitioner except for one case. When the original program C is deterministic and the adapted partitioner is given the location states of the program computed by the path-preserving reducer, the partition is adapted with Alg. 1. Note that we neglect to apply Alg. 1 for non-deterministic original programs, because it then may combine partitions considering different location states of the original program, thus, resulting in a location-inconsistent partitioner. However, to use the adapted partitioner in a fold-reducer, it must remain location-consistent.
Lemma 1. For a given CFA C, condition A, path-preserving reducer ppr, locationconsistent partitioner p, function det ppr(C,A),p is a location-consistent partitioner.
Knowing that the adapted partitioner remains location-consistent, we explain how to derive a deterministic fold-reducer from a fold-reducer. The idea is simple. The deterministic fold-reducer uses for each input program a dedicated variant of the original fold-reducer. This dedicated variant uses the prescribed adaption det(ppr(C, A), p) of the original partitioner to the original program. We already showed that the proposed adaption of the location-consistent partitioner results in a location-consistent partitioner. Now, we can easily conclude that deterministic fold-reducers guarantee the residual property and, thus, can be used to construct conditional verifiers.
While the previous property is mandatory, we build deterministic fold-reducers to produce deterministic programs when given deterministic programs. The subsequent proposition certifies this property of deterministic fold-reducers.
Proposition 1. Given a deterministic fold-reducer FoldRed det p,ppr , a deterministic CFA C, and a condition A, then the residual program FoldRed det p,ppr (C, A) is deterministic.

Evaluation
The main goals of our experiments are to systematically investigate different (fold-)reducers and to find out whether fold-reducers can overcome the problem that reducer ParComp sometimes generates too large and precise residual programs. Since ParComp was the only available reducer our goal was to counteract on its weaknesses (i.e., the sometimes large residual programs), investigating whether one needs to settle for ParComp's weakness is beyond the scope of this evaluation. Another goal of our evaluation is to compare CMC with fold-reducers against non-cooperative combinations, especially sequential combinations. This leads us to three research questions: RQ 1. Do distinct fold-reducers generate different residual programs? RQ 2. Can fold-reducer be better than reducer ParComp and is there a reducer that dominates the others? RQ 3. Can reducer-based CMC replace non-cooperative verifier combinations?
As in other works [9,13], we use a predicate analysis [15] and a value analysis [16], both using a time limit of 100 s 5 , as condition-generating verifiers. If they do not succeed within 100 s, they give up and output a condition. For verifier v 2 , we use the three tools CPA-Seq [29], ESBMC [34], and VeriAbs [30] that performed best on the reachability categories of SV-COMP 2020 6 as well as Symbiotic, which performed best in the SoftwareSystems category of SV-COMP 2020. For all four tools, we use their version submitted to SV-COMP 2020. Additionally, we used three well-maintained analyses, kInduction [7], predicate analysis [15], and value analysis [16], which are part of the award-winning sequential composition of CPAchecker [29]. For them, we also use CPAchecker revision r32965.
We investigated seven fold-reducers r, which we implemented in the FRed plug-in for CPAchecker. All fold-reducers inline functions and typically use the deterministic fold-reducer variant of the reducers described in Sect. 3. Only the CFA and the SEP reducers already generate deterministic, residual programs and do not need to use the deterministic variant. The seven fold-reducers are: CFA Fold-reducer that uses partitioner cfa, i.e., it combines elements with same location states and, thus, reconstructs those parts of the original CFA that have not been fully explored. LH Fold-reducer that is based on partitioner lh L and undoes loop-unfoldings.
It combines all elements with the same loop-head location state from L . LHC Fold-reducer that also aims at reverting loop-unfoldings, but avoids to combine loop executions started in different contexts, i.e., reached on different syntactical paths ignoring finished loops. LHB Fold-reducer that limits loop-unfoldings, i.e., keeps loop-unfoldings up to a given bound (we use 10) and afterwards collapse the unfoldings. LHBC Fold-reducer that like LHB limits loop-unfoldings up to a bound of 10, but additionally separates loop executions with different contexts like LHC. NLH Fold-reducer that undoes branch-but not loop-unfoldings (keeps different loop iterations separated). SEP Fold-reducer that never combines elements, uses partitioner sep (same as ParComp [13]).
Combining each fold-reducer r with all second verifiers v 2 we obtain 49 conditional verifiers v 2 • r. Combining the conditional verifiers with the conditiongenerating verifier gives us 84 reducer-based CMC configurations. 7 Tasks. For our evaluation, we considered the well-established benchmark set 8 from the competition on software verification [4]. We focused on the 6 907 tasks of the ReachSafety categories, because all considered analyses can verify the property "no call to function __VERIFIER_error() is reachable". For each condition-generating verifier v 1 , we created a task set that excludes all tasks for which all reducers reported an error (≈11 %) as well as all easy tasks (≈45 %). A task is considered easy if it does not require CMC because it can be solved in 100 s by v 1 or in 1 000 s 9 by all verifiers v 2 . Thus, we only look at tasks for which CMC can contribute additional value (2 949 tasks for CMC with v 1 =predicate analysis and 3 046 tasks for CMC with v 1 =value analysis).
Execution Framework. We performed our experiments on machines with 33 GB of memory and an Intel Xeon E3-1230 v5 CPU (8 processing units and a frequency of 3.4 GHz). The machines run a Ubuntu 18.04 operating system (Linux kernel 4.15). We use BenchExec [17] to run our experiments. To ensure that all CMC configurations with the same verifier v 1 use the same conditions, we run the condition-generating verifiers v 1 once with a runtime limit of 100 s 10 and a memory limit of 15 GB. The generated conditions are then used when running the conditional verifiers with a runtime limit of 900 s and a memory limit of 15 GB. Replication Support. Our experimental data are available online (see Sect. 6).

Experimental Results
RQ 1 (Different residual programs?) Already our example (Fig. 3) shows that residual programs generated by different reducers can significantly differ in the program size and the branching structure. To further investigate the difference of residual programs, we searched our tasks for programs for which all seven reducers generated residual programs with different numbers of program locations, and selected the program sqrt_Householder_interval.c. Figure 5 shows graph shapes of the CFAs of the residual programs generated by the seven fold-reducers. In a graph shape, the width of line i is proportional to the number of CFA nodes with a shortest path of length i from the initial location. We observe that the graph shapes differ in their height and width. Thus, residual programs differ in their branching structure. Finally, we looked at the size increase of the residual programs, i.e., number of locations of residual program (|L residual |) divided by number of locations of original program (|L original |). Figure 6 shows boxplots 7 We excluded the 14 combinations in which verifiers v1 and v2 are identical because they do not describe a cooperation between different verifiers, but are basically identical to a verification with a single verifier with some additional overhead. 8 https://github.com/sosy-lab/sv-benchmarks/tree/svcomp20 9 We grant CMC 1 000 s. We use a a standard time limit of 900 s for the conditional verifier and, as already explained, 100 s for the condition-generating verifier v1. 10 To not interrupt condition writing, we applied the limit to the verification algorithm.
Imprecise enforcement or condition writing may result in runtimes larger than 100 s.  depicting for each reducer the distribution of the size increases of its residual programs. We observe that the boxes differ in size, the median (middle line) and the whiskers, which supports that residual programs from distinct reducers differ. RQ 2 (Better than ParComp and existence of dominating reducer?) To answer this research question, we study the number of tasks solved correctly by the CMC configurations. We focus on correctly solved tasks and exclude incorrectly solved tasks, which are an unreliable source of information caused by an unsound CMC configuration, e.g., due to an unsound verifier or a bug in one of the CMC configurations. For each CMC configuration, we report the numbers for the full task set 11 and for a restricted task set that only considers those tasks that cannot be solved by the two verifiers in the CMC configuration and, thus, requires cooperation, e.g., via CMC. Table 1 shows the numbers for the CMC configurations using the predicate analysis (upper part) and the value analysis (lower part) for the condition-generating verifier v 1 . The total number of tasks considered in each column are reported at the top. The CMC configurations are fixed by the reducer (row) and the verifier v 2 (columns). Column '+All' displays the numbers of correctly solved tasks by CMC configurations with any verifier v 2 , but excluding tasks that one of the CMC configurations solved incorrectly. 12 Similarly, row 'All' uses any reducer. The last row is discussed later. Looking at Table 1, we first observe that there exist verifier combinations for which the CMC configurations using the SEP reducer, which is identical to reducer ParComp, does not solve the most tasks (bold numbers). We also observe that for some CMC configurations the best reducer differs when considering the full or the restricted task set. Also, the best reducers differ when changing the condition-generating verifier. Hence, the best reducer depends on (1) the task set, and (2) the verifier combination. Additionally, we observe that the numbers in row 'All' are often larger than in the previous rows. Thus, we are more effective when using different reducers. Moreover, our raw data revealed that for all seven reducers there exist tasks that can only be solved by a verifier combination when using this particular reducer. Therefore, we need all seven reducers. RQ 3 (Replacement for non-cooperative verifier combinations?) To answer this question, we compare CMC with fold-reducers against a combination that executes verifier v 1 and v 2 in sequence using the same program for both verifiers and without exchanging any information. This combination is identical to CMC with the identity reducer ID, which returns the input program. Row ID in Table 1 shows the number of tasks solved correctly by the sequential composition. Obviously, the sequential composition does not solve any task in the restricted task set, which only contains tasks that cannot be solved by v 1 and v 2 . To solve these tasks, one needs cooperation approaches like reducer-based CMC. For the full task set, we observe that except for one case row ID solves more tasks than the other rows. Hence, reducer-based CMC should only be used for hard verification tasks that cannot be solved by single verifiers and, thus, need cooperation.

Threats to Validity
In theory, our reducers fulfill the residual condition. However, in practice our reducer implementation might contain bugs that lead to residual programs that 11 Remember that the full task set depends on the condition-generating verifier v1 because we only look at tasks for which CMC can contribute additional value. 12 For +All, the tasks in the restricted set are neither solved by v1 nor any verifier v2. add or miss program behavior, i.e., violate the residual condition. In principle, such bugs can lead to residual programs fulfilling the same property as the original program, but that are easier to verify. Hence, some of the correctly solved tasks might come from such bugs. Furthermore, our results concerning the reducers may not generalize. First, we considered a subset of the SV-COMP tasks and analyses that are run in SV-COMP. The analyses are likely trained on the tasks. However, also CMC configurations that unfold the original program a lot, and thus generate residual programs that look differently from the original program, solved many tasks. We are confident that our results apply to other programs. Second, we used specific time limits for the condition-generating verifier v 1 and the conditional verifier (reducer plus verifier v 2 ). While we chose common time limits, our results may look differently when using different limits.

Related Work
Our work is based on the idea of conditional model checking (CMC) [9], which combines analyses via condition passing. The early conditional model checkers [9] used the condition to directly steer the exploration of the second analysis. Translating the condition into a residual program was first proposed in 2015 [26]. Besides slicing, they construct the residual program from a parallel combination of condition and program. Recently, reducer-based CMC [13] generalized the idea of residual programs and introduced the concept of a reducer. The proposed reducer was similar to the earlier parallel combination [26]. In this paper, we construct multiple, new reducers from the original reducer [13].
Combination of Analyses. One type of combination testifies verification results. These combinations try to confirm alarms [18,25,28,35,44,47] or proofs [1,39,41,45], possibly excluding unconfirmed results. Violation and correctness witnesses [5,6] provide a tool-independent exchange format for alarms and proofs, enabling other tools to check a verifier's result. Further combinations join forces of different analyses. On the one hand, analysis domains are integrated [8,10,23,24,33] to get more precise domains than the pure product. On the other hand, interleavings of analysis algorithms are proposed [3,27,36,37] to benefit from (intermediate) results of other algorithms. A third class of combinations distributes the verification effort among different tools. CMC [9] and reducer-based CMC [13], which we apply, belong to this class. Often, the program parts that could not be verified by the first analyzer are encoded with programs. Sometimes annotations (assertions) are added [19,20,21,46], while program trimming [32] adds assume statements to the original program. Reducer-based CMC [13] and program partitioning [43] output a new program describing a subset of the original program paths. Abstraction-driven concolic testing [27] interleaves concolic testing and predicate abstraction to construct test cases for test goals. CoVeriTest [11] recently generalized this approach. Conditional static analysis [49] splits the program paths into subsets, runs one dataflow analysis on each subset and finally combines the results of these restricted analyses.
Program Transformation for Verification. Our work uses fold-reducers to transform the original program to remove already-verified paths. Like any reducer, fold-reducers may unfold the structure (execution paths) of the original program. Moreover, fold-reducers use a folder that aims at reverting some of the unfoldings introduced by the existing reducer used in the fold-reducer. Likewise, verification refactoring [53] heuristically undoes compiler optimizations to ease verification. Programs-from-proofs [42] pursues the same goal, but it unfolds the program structure to ease verification. Program partitioning [43] and abstractiondriven concolic testing [27] transform the original program to remove tested or infeasible program paths. Unfolding the program structure is a common approach to remove infeasible paths [2,38,48] or improve the analysis result [40,50,51]. In contrast, folding is used less often. Examples are compiler optimizations like constant propagation [52] and common-subexpression elimination [22].

Conclusion
One solution to the problem of verifying complex software systems is to improve verification algorithms and theories. An orthogonal solution is to combine existing techniques. Conditional model checking (CMC) is a promising approach to combine the strengths of different verifiers. To construct new conditional model checkers from existing model checkers in an implementation-less and configurable manner (off-the-shelf, plug-and-play), the concept of reducer-based CMC was recently proposed [13]. Instead of spending developer resources on adapting existing verifiers to make them understand conditions-the information exchange format in CMC-, reducer-based CMC suggests to put reducers in front of existing, off-the-shelf verifiers. The task of a reducer is to convert the condition into a format that the verifier already understands, namely program code. Until now, only one reducer existed. Our experiments revealed that there is a lot of potential for improving the effectiveness by using different kinds of reducers.
Developing new reducers can be a laborious task. One must define how to compute the residual program from the input condition and program. Moreover, one must prove that the reducer fulfills the residual property, a correctness property for the reducer. To systematically study reducers, we developed the framework FRed, which simplifies the development of new reducers. FRed allows us to derive the new reducer from an existing one and a heuristic that describes how to coarsen the residual program generated by the existing reducer. To prove that the derived reducer is indeed a reducer, one only needs to show that the specified heuristic is a location-consistent partitioner, a property much simpler than the residual property. Our experience with FRed is that developing and implementing a new heuristic takes at most a few hours. In the future, algorithm selection could be applied to choose the most suitable reducer for a task.
Data Availability Statement. The reducers and all experimental data are publicly available for replication on a web page 13 and as replication package [12].