Contextual Equivalence for Signal Flow Graphs

We extend the signal flow calculus—a compositional account of the classical signal flow graph model of computation—to encompass affine behaviour, and furnish it with a novel operational semantics. The increased expressive power allows us to define a canonical notion of contextual equivalence, which we show to coincide with denotational equality. Finally, we characterise the realisable fragment of the calculus: those terms that express the computations of (affine) signal flow graphs.


Introduction
Compositional accounts of models of computation often lead one to consider relational models because a decomposition of an input-output system might consist of internal parts where flow and causality are not always easy to assign. These insights led Willems [33] to introduce a new current of control theory, called behavioural control: roughly speaking, behaviours and observations are of prime concern, notions such as state, inputs or outputs are secondary. Independently, programming language theory converged on similar ideas, with contextual equivalence [25,28] often considered as the equivalence: programs are judged to be different if we can find some context in which one behaves differently from the other, and what is observed about "behaviour" is often something quite canonical and simple, such as termination. Hoare [17] and Milner [23] discovered that these programming language theory innovations also bore fruit in the nondeterministic context of concurrency. Here again, research converged on studying simple and canonical contextual equivalences [24,18].
This paper brings together all of the above threads. The model of computation of interest for us is that of signal flow graphs [32,21], which are feedback systems well known in control theory [21] and widely used in the modelling of linear dynamical systems (in continuous time) and signal processing circuits (in discrete time). The signal flow calculus [10,9] is a syntactic presentation with an underlying compositional denotational semantics in terms of linear relations. Armed with string diagrams [31] as a syntax, the tools and concepts of programming language theory and concurrency theory can be put to work and the calculus can be equipped with a structural operational semantics. However, while in previous work [9] a connection was made between operational equivalence (essentially trace equivalence) and denotational equality, the signal flow calculus was not quite expressive enough for contextual equivalence to be a useful notion.
The crucial step turns out to be moving from linear relations to affine relations, i.e. linear subspaces translated by a vector. In recent work [6], we showed that they can be used to study important physical phenomena, such as current and voltage sources in electrical engineering, as well as fundamental synchronisation primitives in concurrency, such as mutual exclusion. Here we show that, in addition to yielding compelling mathematical domains, affinity proves to be the magic ingredient that ties the different components of the story of signal flow graphs together: it provides us with a canonical and simple notion of observation to use for the definition of contextual equivalence, and gives us the expressive power to prove a bona fide full abstraction result that relates contextual equivalence with denotational equality.
To obtain the above result, we extend the signal flow calculus to handle affine behaviour. While the denotational semantics and axiomatic theory appeared in [6], the operational account appears here for the first time and requires some technical innovations: instead of traces, we consider trajectories, which are infinite traces that may start in the past. To record the time, states of our transition system have a runtime environment that keeps track of the global clock.
Because the affine signal flow calculus is oblivious to flow directionality, some terms exhibit pathological operational behaviour. We illustrate these phenomena with several examples. Nevertheless, for the linear sub-calculus, it is known [9] that every term is denotationally equal to an executable realisation: one that is in a form where a consistent flow can be identified, like the classical notion of signal flow graph. We show that the question has a more subtle answer in the affine extension: not all terms are realisable as (affine) signal flow graphs. However, we are able to characterise the class of diagrams for which this is true.
Related work. Several authors studied signal flow graphs by exploiting concepts and techniques of programming language semantics, see e.g. [4,22,29,2]. The most relevant for this paper is [2], which, independently from [10], proposed the same syntax and axiomatisation for the ordinary signal flow calculus and shares with our contribution the same methodology: the use of string diagrams as a mathematical playground for the compositional study of different sorts of systems. The idea is common to diverse, cross-disciplinary research programmes, including Categorical Quantum Mechanics [1,11,12], Categorical Network Theory [3], Monoidal Computer [26,27] and the analysis of (a)synchronous circuits [14,15].
Outline In Section 2 we recall the affine signal flow calculus. Section 3 introduces the operational semantics for the calculus. Section 4 defines contextual equivalence and proves full abstraction. Section 5 introduces a well-behaved class of circuits, that denotes functional input-output systems, laying the groundwork for Section 6, in which the concept of realisability is introduced before a characterisation of which circuit diagrams are realisable. Missing proofs can be found in the extended version of this paper [7].

Background: the Affine Signal Flow Calculus
The Affine Signal Flow Calculus extends the signal flow calculus [9] with an extra generator that allows to express affine relations. In this section, we first recall its syntax and denotational semantics from [6] and then we highlight two key properties for proving full abstraction that are enabled by the affine extension. The operational semantics is delayed to the next section.

Syntax
ACirc is a prop [19]) and morphisms n → m are the circuits of sort (n, m), quotiented by the laws of symmetric monoidal categories [20,31] 4 . The circuit grammar yields the symmetric monoidal structure of ACirc: sequential composition is given by c ; d, the monoidal product is given by c ⊕ d, and identities and symmetries are built by pasting together and in the obvious way. We will adopt the usual convention of writing morphisms of ACirc as string diagrams, . More succinctly, ACirc is the free prop on generators (1)- (2). The free prop on (1)-(2) sans and , hereafter called Circ, is the signal flow calculus from [9].

Denotational Semantics and Axiomatisation
The semantics of circuits can be given denotationally by means of affine relations.
Definition 1. Let k be a field. An affine subspace of k d is a subset V ⊆ k d that is either empty or for which there exists a vector a ∈ k d and a linear subspace A k-affine relation of type n → m is an affine subspace of k n × k m , considered as a k-vector space.
Note that every linear subspace is affine, taking a above to be the zero vector. Affine relations can be organised into a prop: Definition 2. Let k be a field. Let ARel k be the following prop: arrows n → m are k-affine relations.
composition is relational: monoidal product given by In order to give semantics to ACirc, we use the prop of affine relations over the field k(x) of fractions of polynomials in x with coefficients from k. Elements q ∈ k(x) are a fractions k0+k1·x 1 +k2·x 2 +···+kn·x n l0+l1·x 1 +l2·x 2 +···+lm·l m for some n, m ∈ N and k i , l i ∈ k. Sum, product, 0 and 1 in k(x) are defined as usual.
The reader can easily check that the pair of 1-dimensional vectors 1, 1 1−x ∈ k(x) 1 × k(x) 1 belongs to the denotation of the circuit in Example 1.
The denotational semantics enjoys a sound and complete axiomatisation. The axioms involve only basic interactions between the generators (1)- (2). The resulting theory is that of Affine Interacting Hopf Algebras (aIH).The generators in (1) form a Hopf algebra, those in (2) form another Hopf algebra, and the interaction of the two give rise to two Frobenius algebras. We refer the reader to [6] for the full set of equations and all further details.

Affine vs Linear Circuits
It is important to highlight the differences between ACirc and Circ. The latter is the purely linear fragment: circuit diagrams of Circ denote exactly the linear relations over k(x) [8], while those of ACirc denote the affine relations over k(x).
The additional expressivity afforded by affine circuits is essential for our development. One crucial property is that every polynomial fraction can be expressed as an affine circuit of sort (0, 1).
Proof. For each p ∈ k(x), let P be the linear subspace generated by the pair of 1-dimensional vectors (1, p). By fullness of the denotational semantics of Circ Proposition 2 asserts that any behaviour (u, v) occurring in the denotation of some circuit c, i.e., such that (u, v) ∈ [[c]], can be expressed by a pair of circuits (c u , c v ). We will, in due course, think of such a pair as a context, namely an environment with which a circuit can interact. Observe that this is not possible with the linear fragment Circ, since the only singleton linear subspace is 0.
Another difference between linear and affine concerns circuits of sort (0, 0). Indeed k(x) 0 = {•}, and the only linear relation over k(

Operational Semantics for Affine Circuits
Here we give the structural operational semantics of affine circuits, building on previous work [9] that considered only the core linear fragment, Circ. We consider circuits to be programs that have an observable behaviour. Observations are possible interactions at the circuit's interface. Since there are two interfaces: a left and a right, each transition has two labels.
In a transition t c v − → w t c , c and c are states, that is, circuits augmented with information about which values k ∈ k are stored in each register ( x and x ) at that instant of the computation. When transitioning to c , the v above the arrow is a vector of values with which c synchronises on the left, and the w below the arrow accounts for the synchronisation on the right. States are decorated with runtime contexts: t and t are (possibly negative) integers that-intuitively-indicate the time when the transition happens. Indeed, in Fig. 2, every rule advances time by 1 unit. "Negative time" is important: as we shall see in Example 3, some executions must start in the past.
The rules in the top section of Fig. 2 provide the semantics for the generators in (1): is a copier, duplicating the signal arriving on the left; accepts any signal on the left and discards it, producing nothing on the right; is an adder that takes two signals on the left and emits their sum on the right, emits the constant 0 signal on the right; k is an amplifier, multiplying the signal on the left by the scalar k ∈ k. All the generators described so far are stateless. State is provided by x l which is a register ; a synchronous one place buffer with the value l stored. When it receives some value k on the left, it emits l on the right and stores k. The behaviour of the affine generator depends on the time: when t = 0, it emits 1, otherwise it emits 0. Observe that the behaviour of all other generators is time-independent. So far, we described the behaviour of the components in (1) using the intuition that signal flows from left to right: in a transition v − → w , the signal v on the left is thought as trigger and w as effect. For the generators in (2), whose behaviour is defined by the rules in the second section of Fig. 2, the behaviour is symmetric-indeed, here it is helpful to think of signals as flowing from right to left. The next section of Fig. 2 specifies the behaviours of the structural connectors of (3): is a twist, swapping two signals, is the empty circuit and is the identity wire: the signals on the left and on the right ports are equal. Finally, the rule for sequential ; composition forces the two components to have the same value v on the shared interface, while for parallel ⊕ composition, components can proceed independently. Observe that both forms of composition require component transitions to happen at the same time.
Definition 4. Let c ∈ ACirc. The initial state c 0 of c is the one where all the registers store 0. A computation of c starting at time t ≤ 0 is a (possibly infinite) sequence of transitions Since all transitions increment the time by 1, it suffices to record the time at which a computation starts. As a result, to simplify notation, we will omit the runtime context after the first transition and, instead of (4), write The circuit in Example 1 can perform the following computation.
In the example above, the flow has a clear left-to-right orientation, albeit with a feedback loop. For arbitrary circuits of ACirc this is not always the case, which sometimes results in unexpected operational behaviour.
Example 3. In x is not possible to identify a consistent flow: goes from left to right, while x from right to left. Observe that there is no computation starting at t = 0, since in the initial state the register contains 0 while must emit 1. There is, however, a (unique!) computation starting at time t = −1, that loads the register with 1 before can also emit 1 at time t = 0.
Similarly, x x features a unique computation starting at time t = −2. −2 It is worthwhile clarifying the reason why, in the affine calculus, some computations start in the past. As we have already mentioned, in the linear fragment the semantics of all generators is time-independent. It follows easily that timeindependence is a property enjoyed by all purely linear circuits. The behaviour of , however, enforces a particular action to occur at time 0. Considering this in conjunction with a right-to-left register results in x , and the effect is to anticipate that action by one step to time -1, as shown in Example 3. It is obvious that this construction can be iterated, and it follows that the presence of a single time-dependent generator results in a calculus in which the computation of some terms must start at a finite, but unbounded time in the past. Here there is no possible transition at t = 0, since at that time must emit a 1 and can only synchronise on a 0. Instead, the circuit can always perform an infinite computation t . , for any t ≤ 0. Roughly speaking, the computations of these two (0, 0) circuits are operational mirror images of the two possible denotations of Proposition 3. This intuition will be made formal in Section 4. For now, it is worth observing that for all c, ⊕ c can perform the same computations of c, while ⊕ c cannot ever make a transition at time 0.
Example 5. Consider the circuit x x , which again features conflicting flow. Our equational theory equates it with , but the computations involved are subtly different. Indeed, for any sequence a i ∈ k, it is obvious that admits the computation 0 The circuit x x admits a similar computation, but we must begin at time t = −1 in order to first "load" the registers with a 0 : The circuit x x , which again is equated with by the equational theory, is more tricky. Although every computation of can be reproduced, x x admits additional, problematic computations. Indeed, consider at which point no further transition is possible-the circuit can deadlock.
The following lemma is an easy consequence of the rules of Fig. 2 and follows by structural induction. It states that all circuits can stay idle in the past.

Trajectories
For the non-affine version of the signal flow calculus, we studied in [9] traces arising from computations. For the affine extension, this is not possible since, as explained above, we must also consider computations that start in the past. In this paper, rather than traces we adopt a common control theoretic notion.
Definition 5. An (n, m)-trajectory σ is a Z-indexed sequence σ : Z → k n × k m that is finite in the past, i.e., for which ∃j ∈ Z such that σ(i) = (0, 0) for i ≤ j.
By the universal property of the product we can identify σ : Z → k n × k m with the pairing σ l , σ r of σ l : Z → k n and σ r : Z → k m . A (k, m)-trajectory σ and (m, n)-trajectory τ are compatible if σ r = τ l . In this case, we can define their composite, a (k, n)-trajectory σ ; τ by σ ; τ := σ l , τ r . Given an (n 1 , m 1 )trajectory σ 1 , and an (n 2 , m 2 )-trajectory σ 2 , their product, an (n 1 +n 2 , m 1 +m 2 )- . Using these two operations we can organise sets of trajectories into a prop.
Definition 6. The composition of two sets of trajectories is defined as S ; T := {σ ; τ | σ ∈ S, τ ∈ T are compatible}. The product of sets of trajectories is defined as Clearly both operations are strictly associative. The unit for ⊕ is the singleton with the unique (0, 0)-trajectory. Also ; has a two sided identity, given by sets of "copycat" (n, n)-trajectories. Indeed, we have that: Proposition 4. Sets of (n, m)-trajectories are the arrows n → m of a prop Traj with composition and monoidal product given as in Definition 6.
Traj serves for us as the domain for operational semantics: given a circuit c and an infinite computation Definition 7. For a circuit c, c is the set of trajectories given by its infinite computations, following the translation (8) above.
The assignment c → c is compositional, that is: Theorem 1. · : ACirc → Traj is a morphism of props.
Example 6. Consider the computations (5) and (6) from Example 5. According to (8) both are translated into the trajectory σ mapping i ≥ 0 into (a i , a i ) and i < 0 into (0, 0). The reader can easily verify that, more generally, it holds that = x x . At this point it is worth to remark that the two circuits would be distinguished when looking at their traces: the trace of computation (5) is different from the trace of (6). Indeed, the full abstraction result in [9] does not hold for all circuits, but only for those of a certain kind. The affine extension obliges us to consider computations that starts in the past and, in turn, this drives us toward a stronger full abstraction result, shown in the next section.
Before concluding, it is important to emphasise that = x x also holds. Indeed, problematic computations, like (7), are all finite and, by definition, do not give rise to any trajectory. The reader should note that the use of trajectories is not a semantic device to get rid of problematic computations. In fact, trajectories do not appear in the statement of our full abstraction result; they are merely a convenient tool to prove it. Another result (Proposition 9) independently takes care of ruling out problematic computations.

Contextual Equivalence and Full Abstraction
This section contains the main contribution of the paper: a traditional full abstraction result asserting that contextual equivalence agrees with denotational equivalence. It is not a coincidence that we prove this result in the affine setting: affinity plays a crucial role, both in its statement and proof. In particular, Proposition 3 gives us two possibilities for the denotation of (0, 0) circuits: (i) ∅-which, roughly speaking, means that there is a problem (see e.g. Example 4) and no infinite computation is possible-or (ii) id 0 , in which case infinite computations are possible. This provides us with a basic notion of observation, akin to observing termination vs non-termination in the λ-calculus. To be able to make observations about arbitrary circuits we need to introduce an appropriate notion of context. Roughly speaking, contexts for us are (0, 0)-circuits with a hole into which we can plug another circuit. Since ours is a variable-free presentation, "dangling wires" assume the role of free variables [16]: restricting to (0, 0) contexts is therefore analogous to considering ground contexts-i.e. contexts with no free variables-a standard concept of programming language theory.
To define contexts formally, we extend the syntax of Section 2.1 with an extra generator "−" of sort (n, m). A (0, 0)-circuit of this extended syntax is a context when "−" occurs exactly once. Given an (n, m)-circuit c and a context , and may emit different values at time t, but the computation will get stuck at t + 1. However, our definition of ↑ only cares about whether C[ x x ] can perform an infinite computation. Indeed it can, as long as and consistently emit the same value at each time step.
If we think of contexts as tests, and say that a circuit c passes test C[−] if C[c] perform an infinite computation, then our notion of contextual equivalence is may-testing equivalence [13]. From this perspective, and x x are not must equivalent, since the former must pass the test ; − ; while x x may not. It is worth to remark here that the distinction between may and must testing will cease to make sense in Section 5 where we identify a certain class of circuits equipped with a proper flow directionality and thus a deterministic, input-output, behaviour.
The remainder of this section is devoted to the proof of Theorem 2. We will start by clarifying the relationship between fractions of polynomials (the denotational domain) and trajectories (the operational domain).

From Polynomial Fractions to Trajectories
The missing link between polynomial fractions and trajectories are (formal) Laurent series: we now recall this notion. Formally, a Laurent series is a function σ : Z → k for which there exists j ∈ Z such that σ(i) = 0 for all i < j. We write σ as . . . , σ(−1), σ(0), σ(1), . . . with position 0 underlined, or as formal sum ∞ i=d σ(i)x i . Each Laurent series σ has then a degree d ∈ Z, which is the first non-zero element. Laurent series form a field k((x)): sum is pointwise, product is by convolution, and the inverse σ −1 of σ with degree d is defined as: , and thus into k((x)): a polynomial p 0 + p 1 x + · · · + p n x n can also be regarded as the power series ∞ i=0 p i x i with p i = 0 for all i > n. Because Laurent series are closed under division, this immediately gives also an embedding of the field of polynomial fractions k(x) into k((x)). Note that the full expressiveness of k((x)) is required: for instance, the fraction 1 x is represented as the Laurent series . . . , 0, 1, 0, 0, . . . , which is not a power series, because a non-zero value appears before position 0. In fact, fractions that are expressible as power series are precisely the rational fractions, i.e. of the form k0+k1x+k2x 2 ···+knx n l0+l1x+l2x 2 ···+lnx n where l 0 = 0. Rational fractions form a ring k x which, differently from the full field k(x), embeds into k [[x]]. Indeed, whenever l 0 = 0, the inverse of l 0 + l 1 x + l 2 x 2 · · · + l n x n is, by (9), a bona fide power series. The commutative diagram on the right is a summary.
Relations between k((x))-vectors organise themselves into a prop ARel k((x)) (see Definition 2). There is an evident prop morphism ι : ARel k(x) → ARel k((x)) : it maps the empty affine relation on k(x) to the one on k((x)), and otherwise applies pointwise the embedding of k(x) into k((x)). For the next step, observe that trajectories are in fact rearrangements of Laurent series: each pair of vectors (u, v) ∈ k((x)) n × k((x)) m , as on the left below, yields the trajectory κ(u, v) defined for all i ∈ Z as on the right below.
Similarly to ι, the assignment κ extends to sets of vectors, and also to a prop morphism from ARel k((x)) to Traj. Together, κ and ι provide the desired link between operational and denotational semantics.
Proof. Since both are symmetric monoidal functors from a free prop, it is enough to check the statement for the generators of ACirc. We show, as an example, the case of . By Definition 3, . This is mapped by ι to α, α α | α ∈ k((x)) . Now, to see that κ(ι([[ ]])) = , it is enough to observe that a trajectory σ is in κ(ι([[ ]])) precisely when, for all

Proof of Full Abstraction
We now have the ingredients to prove Theorem 2. First, we prove an adequacy result for (0, 0) circuits. Next we obtain a result that relates denotational equality in all contexts to equality in aIH. Note that it is not trivial: since we consider ground contexts it does not make sense to merely consider "identity" contexts. Instead, it is at this point that we make another crucial use of affinity, taking advantage of the increased expressivity of affine circuits, as showcased by Proposition 2.

Functional Behaviour and Signal Flow Graphs
There is a sub-prop SF of Circ of classical signal flow graphs (see e.g. [21]). Here signal flows left-to-right, possibly featuring feedback loops, provided that these go through at least one register. Feedback can be captured algebraically via an operation Tr(·) : Circ[n + 1, m + 1] → Circ[n, m] taking c : n + 1 → m + 1 to: Following [9], let us call C − → irc the free sub-prop of Circ of circuits built from (3) and the generators of (1), without . Then SF is defined as the closure of C − → irc under Tr(·). For instance, the circuit of Example 2 is in SF.
Signal flow graphs are intimately connected to the executability of circuits. In general, the rules of Figure 2 do not assume a fixed flow orientation. As a result, some circuits in Circ are not executable as functional input-output systems, as we have demonstrated with x , and x x of Examples 3-5. Notice that none of these are signal flow graphs. In fact, the circuits of SF do not have pathological behaviour, as we shall state more precisely in Proposition 9.
At the denotational level, signal flow graphs correspond precisely to rational functional behaviours, that is, matrices whose coefficients are in the ring k x of rational fractions (see Section 4.1). We call such matrices, rational matrices. One may check that the semantics of a signal flow graph c : (n, m) is always Conversely, all relations that are the graph of rational matrices can be expressed as signal flow graphs. Proof. This is a folklore result in control theory which can be found in [30]. The details of the translation between rational matrices and circuits of SF can be found in [10,Section 7].
The following gives an alternative characterisation of rational matrices-and therefore, by Proposition 7, of the behaviour of signal flow graphs-that clarifies their role as realisations of circuits.
Proposition 8 is another guarantee of good behaviour-it justifies the name of inputs (resp. outputs) for the left (resp. right) ports of signal flow graphs. Recall from Section 4.1 that rational fractions can be mapped to Laurent series of nonnegative degree, i.e., to plain power series. Operationally, these correspond to trajectories that start after t = 0. Proposition 8 guarantees that any trajectory of a signal flow graph whose first nonzero value on the left appears at time t = 0, will not have nonzero values on the right starting before time t = 0. In other words, signal flow graphs can be seen as processing a stream of values from left to right. As a result, their ports can be clearly partitioned into inputs and outputs.
But the circuits of SF are too restrictive for our purposes. For example, x can also be seen to realise a functional behaviour transforming inputs on the left into outputs on the right yet it is not in SF. Its behaviour is no longer linear, but affine. Hence, we need to extend signal flow graphs to include functional affine behaviour. The following definition does just that.
Definition 10. Let ASF be the sub-prop of ACirc obtained from all the generators in (1), closed under Tr(·). Its circuits are called affine signal flow graphs.
As before, none of x , and x x from Examples 3-5 are affine signal flow graphs. In fact, ASF rules out pathological behaviour: all computations can be extended to be infinite, or in other words, do not get stuck.
Proposition 9. Given an affine signal flow graph f , for every computation Proof. By induction on the structure of affine signal flow graphs.
If SF circuits correspond precisely to k x -matrices, those of ASF correspond precisely to k x -affine transformations.
Definition 11. A map f : k(x) n → k(x) m is an affine map if there exists an m × n matrix A and b ∈ k(x) m such that f (p) = A · p + b for all p ∈ k(x) n . We call the pair (A, b) the representation of f .
The notion of rational affine map is a straightforward extension of the linear case and so is the characterisation in terms of rational input-output behaviour.
The following extends the correspondence of Proposition 7, showing that ASF is the rightful affine heir of SF. Proof. Let f be given by p → Ap + b for some rational m × n matrix A and vector b ∈ k x m . By Proposition 7, we can find a circuit c A of SF such that  For the converse direction it is straightforward to check by structural induction that the denotation of affine signal flow graphs is the graph (in the set-theoretic sense of pairs of values) of some rational affine map.

Realisability
In the previous section we gave a restricted class of morphisms with good behavioural properties. We may wonder how much of ACirc we can capture with this restricted class. The answer is, in a precise sense: most of it.
Surprisingly, the behaviours realisable in Circ-the purely linear fragmentare not more expressive. In fact, from an operational (or denotational, by full abstraction) point of view, Circ is nothing more than jumbled up version of SF. Indeed, it turns out that Circ enjoys a realisability theorem: any circuit c of Circ can be associated with one of SF, that implements or realises the behaviour of c into an executable form. But the corresponding realisation may not flow neatly from left to right like signal flow graphs do-its inputs and outputs may have been moved from one side to the other. Consider for example, the circuit on the right x x It does not belong to SF but it can be read as a signal flow graph with an input that has been bent and moved to the bottom right. The behaviour it realises can therefore executed by rewiring this port to obtain a signal flow graph: We will not make this notion of rewiring precise here but refer the reader to [9] for the details. The intuition is simply that a rewiring partitions the ports of a circuit into two sets-that we call inputs and outputs-and uses or to bend input ports to the left and and output ports to the right. The realisability theorem then states that we can always recover a (not necessarily unique) signal flow graph from any circuit by performing these operations. This theorem allows us to extend the notion of inputs and outputs to all circuits of Circ.
Definition 13. A port of a circuit c of Circ is an input (resp. output) port, if there exists a realisation for which it is an input (resp. output).
Note that, since realisations are not necessarily unique, the same port can be both an input and an output. Then, the realisability theorem (Theorem 4) says that every port is always an input, an output or both (but never neither).
An output-only port is an output port that is not an input port. Similarly an input-only port in an input port that is not an output port.
Example 8. The left port of the register x is input-only whereas its right port is output-only. In the identity wire, both ports are input and output ports. The single port of is output-only ; that of is input-only.
While in the purely linear case, all behaviours are realisable, the general case of ACirc is a bit more subtle. To make this precise, we can extend our definition of realisability to include affine signal flow graphs.

Definition 14.
A circuit of ACirc is realisable if its ports can be rewired so that it is equivalent to a circuit of ASF.

Example 9.
is realisable; x is not.
Notice that Proposition 11, gives the following equivalent semantic criterion for realisability. Realisable behaviours are precisely those that map rationals to rationals.
Theorem 5. A circuit c is realisable iff its ports can be partitioned into two sets, that we call inputs and outputs, such that the corresponding rewiring of c is an affine rational map from inputs to outputs.
We offer another perspective on realisability below: realisable behaviours correspond precisely to those for which the constants are connected to inputs of the underlying Circ-circuit. First, notice that, since (1-dup) = and (1-del) = in aIH, we can assume without loss of generality that each circuit contains exactly one .
Proposition 12. Every circuit c of ACirc is equivalent to one with precisely one and no .
For c : (n, m) a circuit of ACirc, we will callĉ the circuit of Circ of sort (n + 1, m) that one obtains by first transforming c into an equivalent circuit with a single and no as above, then removing this , and replacing it by an identity wire that extends to the left boundary.
Theorem 6. A circuit c is realisable iff is connected to an input port ofĉ.

Conclusion and Future Work
We introduced the operational semantics of the affine extension of the signal flow calculus and proved that contextual equivalence coincides with denotational equality, previously introduced and axiomatised in [6]. We have observed that, at the denotational level, affinity provides two key properties (Propositions 2 and 3) for the proof of full abstraction. However, at the operational level, affinity forces us to consider computations starting in the past (Example 3) as the syntax allows terms lacking a proper flow directionality. This leads to circuits that might deadlock ( in Example 4) or perform some problematic computations ( x x in Example 5). We have identified a proper subclass of circuits, called affine signal flow graphs (Definition 10), that possess an inherent flow directionality: in these circuits, the same pathological behaviours do not arise (Proposition 9). This class is not too restrictive as it captures all desirable behaviours: a realisability result (Theorem 5) states that all and only the circuits that do not need computations to start in the past are equivalent to (the rewiring of) an affine signal flow graph. The reader may be wondering why we do not restrict the syntax to affine signal flow graphs. The reason is that, like in the behavioural approach to control theory [33], the lack of flow direction is what allows the (affine) signal flow calculus to achieve a strong form of compositionality and a complete axiomatisation (see [9] for a deeper discussion).
We expect that similar methods and results can be extended to other models of computation. Our next step is to tackle Petri nets, which, as shown in [5], can be regarded as terms of the signal flow calculus, but over N rather than a field.