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PISYN — High-Level Synthesis of Application Specific Pipelined Hardware

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High-Level VLSI Synthesis

Abstract

The PISYN high-level synthesis system is the result of a project at GE Corporate Research and Development in Schenectady, NY. It was motivated by the need for increased productivity and cost effectiveness in the design of application specific pipelined hardware. The PISYN (pi’ • sin), PIpeline SYNthesis system is a tool within an overall framework called FACE, Flexible Architecture Compilation Environment. This chapter will discuss PISYN only; the interested reader is referred to [1][2] where FACE and its user interface are discussed.

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References

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© 1991 Springer Science+Business Media New York

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Casavant, A.E., Hwang, K.S., McNall, K.N. (1991). PISYN — High-Level Synthesis of Application Specific Pipelined Hardware. In: Camposano, R., Wolf, W. (eds) High-Level VLSI Synthesis. The Springer International Series in Engineering and Computer Science, vol 136. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3966-7_3

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  • DOI: https://doi.org/10.1007/978-1-4615-3966-7_3

  • Publisher Name: Springer, Boston, MA

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