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Global Scheduling and Allocation Algorithms in the HAL System

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High-Level VLSI Synthesis

Part of the book series: The Springer International Series in Engineering and Computer Science ((SECS,volume 136))

Abstract

As demonstrated by the recent flurry of activity in this area, high-level synthesis [1] — often referred to as behavioral synthesis — is becoming an increasingly popular research topic. In this chapter, we present the most up-to-date description of the scheduling and allocation algorithms used in the HAL system [2-6], with emphasis on issues that, for lack of space, were not adequately covered in previous papers. These algorithms are not tied to the HAL synthesis methodology. Due to their flexibility, they can — and have been — integrated into more specialized high-level synthesis systems, as attested by their present use both in academia [20-26] and industry [27-29].

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Paulin, P.G. (1991). Global Scheduling and Allocation Algorithms in the HAL System. In: Camposano, R., Wolf, W. (eds) High-Level VLSI Synthesis. The Springer International Series in Engineering and Computer Science, vol 136. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3966-7_11

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  • DOI: https://doi.org/10.1007/978-1-4615-3966-7_11

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-6771-0

  • Online ISBN: 978-1-4615-3966-7

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