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On Synthesis of Reduced Order Models

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Book cover Model Reduction for Circuit Simulation

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 74))

Abstract

A framework for model reduction and synthesis is presented, which enables the re-use of reduced order models in circuit simulation. Two synthesis techniques are considered for obtaining the circuit representation (netlist) of the reduced model: (1) by means of realizing the reduced transfer function and (2) by unstamping the reduced system matrices. For both methods, advantages and limitations are discussed. Especially when model reduction exploits structure preservation, we show that using the model as a current-driven element is possible, and allows for synthesis without controlled sources. The presented framework serves as a basis for reduction of large parasitic R/RC/RCL networks.

R. Ionutiu: Marie Curie Fellowship Programme COMSON (Contract Number MRTN-CT-2005-019417). J. Rommes: Marie-Curie Fellowship Programme O-MOORE-NICE! (FP6 MTKI-CT-2006-042477).

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Notes

  1. 1.

    The subscript Y refers to quantities associated with a system in admittance form.

  2. 2.

    The MNA form (12.4) corresponds to the ungrounded circuit (i.e., the reference node is counted within the n 1 external nodes), resulting in a defective matrix pencil \(({\mathbf A}_Y,{\mathbf E}_Y)\). For subsequent computations such as the construction of a Krylov subspace, the pencil \(({\mathbf A}_Y,{\mathbf E}_Y)\) must be regular. Thus in (12.4), one node must be chosen as a ground (reference) node by removing the row/column corresponding to that node; this ensures that the regularity conditions (i) and (ii) from [23, page 5, Assumption 4] are satisfied. The positive definiteness of \(\fancyscript{C}, \fancyscript{L}, \fancyscript{G}\) is also a necessary condition to ensure the circuit’s passivity.

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Correspondence to Roxana Ionutiu .

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Ionutiu, R., Rommes, J. (2011). On Synthesis of Reduced Order Models. In: Benner, P., Hinze, M., ter Maten, E. (eds) Model Reduction for Circuit Simulation. Lecture Notes in Electrical Engineering, vol 74. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-0089-5_12

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  • DOI: https://doi.org/10.1007/978-94-007-0089-5_12

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