Abstract
In this paper, a low cost self-reconfigurable data processing system with a USB interface is presented. A single FPGA performs all processing and controls the multiple configurations without any additional elements, such as microprocessor, host computer or additional FPGAs. This architecture allows high performances at very low power consumption. In addition, a hierarchical reconfiguration system is used to support a large number of different processing tasks without the penalty in power consumption of a big local configuration memory. Due to its simplicity and low power, this data processing system is specially suitable for portable applications.
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Lorenz, M.G., Mengibar, L., Entrena, L., Sánchez-Reillo, R. (2003). Data Processing System with Self-reconfigurable Architecture, for Low Cost, Low Power Applications. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_22
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DOI: https://doi.org/10.1007/978-3-540-45234-8_22
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