Abstract
As the complexity and the size of the VLSI systems grow steadily, the complexity a human mind can grasp remains the same. This fact forces designers to use design automation tools. It is almost impossible for a designer to visualize the gate-level structure of a reasonably complex VLSI chip, not to mention its transistor-level structure. Automatic placement and routing tools have already become an integral part of VLSI design. Synthesis tools are now on the rise to help designers cope with complexity at higher levels.
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References
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© 1992 Springer Science+Business Media Dordrecht
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Konuk, H., Marschner, F.E. (1992). A VHDL-Driven Synthesis Environment. In: Mermet, J. (eds) VHDL for Simulation, Synthesis and Formal Proofs of Hardware. The Kluwer International Series in Engineering and Computer Science, vol 183. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3562-1_8
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DOI: https://doi.org/10.1007/978-1-4615-3562-1_8
Publisher Name: Springer, Boston, MA
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Online ISBN: 978-1-4615-3562-1
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