Abstract
The VLSI placement problem consists of finding an optimum placement of the VLSI components in the plane of the chip. A standard optimization goal is to minimize the total amount of space occupied by the wires on the chip. We model the VLSI placement problem by considering the problem of placing tiles on the plane when each tile has a preassigned area into which it must be placed. We show that for most cases this problem appears computationally infeasible, and we present some fast algorithms for some special cases.
This research was done while the author was a student research assistant at IBM Research, San Jose.
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© 1987 Plenum Press, New York
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Broder, A., Simons, B. (1987). Placing Tiles in the Plane. In: Ghosh, S.P., Kambayashi, Y., Tanaka, K. (eds) Foundations of Data Organization. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1881-1_18
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DOI: https://doi.org/10.1007/978-1-4613-1881-1_18
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4612-9048-3
Online ISBN: 978-1-4613-1881-1
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