Abstract
This chapter summarizes the work presented in this monograph. It provide a brief summary of all the analysis and design approaches presented to facilitate the implementation of radiation and process variation tolerant VLSI circuits. This chapter also presents some future directions for research, and a summary of the broader impact of this work.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
K. Mohanram, “Closed-form simulation and robustness models for SEU-tolerant design,” in Proc. of the VLSI Test Symposium, 2005, pp. 327–333.
P. Dahlgren and P. Liden, “A switch-level algorithm for simulation of transients in combinational logic,” in Proc. of the Intl. Symposium on Fault-Tolerant Computing, June 1995, pp. 207–216.
B. Zhang, A. Arapostathis, S. Nassif, and M. Orshansky, “Analytical modeling of SRAM dynamic stability,” in Proc. of the Intl. Conf. on Computer-Aided Design, Nov. 2006, pp. 315–322.
Synopsys Inc., Mountain View, CA, Sentaurus user’s manuals, 2007.12 edition.
Q. A. Khan, S. K. Wadhwa, and K. Misri, “A single supply level shifter for multi voltage systems,” in Proc. of the Intl. Conf. on VLSI Design, Jan. 2006, pp. 1–4.
Author information
Authors and Affiliations
Corresponding authors
Rights and permissions
Copyright information
© 2010 Springer-Verlag US
About this chapter
Cite this chapter
Garg, R., Khatri, S.P. (2010). Conclusions and Future Directions. In: Analysis and Design of Resilient VLSI Circuits. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-0931-2_11
Download citation
DOI: https://doi.org/10.1007/978-1-4419-0931-2_11
Published:
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-0930-5
Online ISBN: 978-1-4419-0931-2
eBook Packages: EngineeringEngineering (R0)