Abstract
The development of a 4 M DRAM (dynamic random access memory) within the Siemens MEGA Project marks the entrance into the sub micron era of industrial integrated circuit technology. Technological requirements are characterized by a chip area of nearly 100 mm2, memory cell size of around 10 μm2 and a minimum feature size on the silicon wafer of 0.8 μm [1],[ 2]. Out of the many development areas of this project, optical microlithography including metrology is one of the key subjects which will be discussed. Further items are the mask technology for lithography, computer aided design tools for efficient and faultless circuit development and some aspects relevant for packaging large silicon chips into standardized plastic packages.
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© 1988 Friedr. Vieweg & Sohn Verlagsgesellschaft mbH
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Beinvogl, W., Hopf, E. (1988). The development of a 4 Mbit DRAM. In: Rössler, U. (eds) Festkörperprobleme 28. Advances in Solid State Physics, vol 28. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0107849
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DOI: https://doi.org/10.1007/BFb0107849
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