Abstract
In this paper we address the problems posed when Artificial Neural Networks models are implemented in programmable digital hardware. Within this context, we shall especially emphasise the realisation of the arithmetic operators required by these models, since it constitutes the main constraint (due to the required amount of resources) found when they are to be translated into physical hardware. The dynamic reconfiguration properties (i.e., the possibility to change the functionality of the system in real time) of a new family of programmable devices called FIPSOC (Field Programmable System On a Chip) offer an efficient alternative (both in terms of area and speed) for implementing hardware accelerators. After presenting the data flow associated with a serial arithmetic unit, we shall show how its dynamic implementation in the FIPSOC device is able to outperform systems realised in conventional programmable devices.
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References
Cox, C., Balnz, W.E.: GANGLION: A fast field-programmable gate array implementation of a connectionist classifier. IEEE Journal on Solid-State Circuits, Vol. 27, no. 3 (1992) 288–299
Beiu, V., Taylor, J.G.: Optimal Mapping of Neural Networks Onto FPGAs—A New Constructive Algorithm. In: Mira, J., Sandoval, F. (eds.): From Natural to Artificial Neural Computation. Lecture Notes in Computer Science, Vol. 930. Springer-Verlag, Berlin Heidelberg New York (1995) 822–829
Hartmann, G, Frank, G. Schäfer, M. Wolff, C:SPIKE 128K-An Accelerator for Dynamic Simulation of Large Pulse-Coded Networks. In: Klar. H, König, A, Ramacher, U. (eds.): Proceedings of the 6th International Conference on Microelectronics for Neural Networks, Evolutionary & Fuzzy Systems. University of Technology Dresden (1997) 130–139
Pérez-Uribe, A., Sanchez, E.: FPGA Implementation of Neuronlike Adaptive elements. In: Gerstner, W., Germond, A., Hasler, M. Nicoud, J.-D. (eds.): Artificial Neural Networks-ICANN'97. Lecture Notes in Computer Science, Vol. 1327. Springer-Verlag, Berlin Heidelberg New York (1997) 1247–1252
Becker, J., Kirchbaum, A., Renner, F.-M., Glesner, M.: Perspectives of Reconfigurable Computing in Research, Industry and Education. In: Hartenstein, R., Keevallik A. (eds.): Field-Programmable Logic and Applications. Lecture Notes in Computer Science, Vol. 1482. Springer-Verlag, Berlin Heidelberg New York (1998) 39–48
DeHon, A.: Reconfigurable Architectures for General-Purpose Computing. A.I. Technical Report No. 1586. MIT Artificial Intelligence Laboratory (1996)
Churcher, S., Kean, T., Wilkie, B.: The XC6200 FastMap Processor Interface. Field Programmable Logic and Applications, Proceedings of FPL'95. Springer-Verlag (1995) 36–43.
Hesener, A.: Implementing Reconfigurable Datapaths in FPGAs for Adaptive Filter Design. Field Programmable Logic, Proceedings of FPL'96. Springer-Verlag (1996) 220–229
Faura, J., Horton, C., Van Duong, P., Madrenas, J., Insenser, J.M.: A Novel Mixed Signal Programmable Device with On-Chip Microprocessor. Proceedings of the IEEE 1997 Custom Integrated Circuits Conference (1997) 103–106
Kean, T., New, B., Slous, B.: A Fast Constant Coefficient Multiplier for the XC6200. Field-Programmable Logic. Lecture Notes in Computer Science, Vol. 1142. Springer-Verlag, Berlin Heidelberg New York (1996) 230–236
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Moreno, J.M., Cabestany, J., Cantó, E., Faura, J., Insenser, J.M. (1999). The role of dynamic reconfiguration for implementing artificial neural networks models in programmable hardware. In: Mira, J., Sánchez-Andrés, J.V. (eds) Engineering Applications of Bio-Inspired Artificial Neural Networks. IWANN 1999. Lecture Notes in Computer Science, vol 1607. Springer, Berlin, Heidelberg . https://doi.org/10.1007/BFb0100475
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DOI: https://doi.org/10.1007/BFb0100475
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