SPIKE_4096: A neural integrated circuit for image segmentation

  • Jean -Luc Rebourg
  • Jean -Denis Muller
  • Manuel Samuelides
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1478)


An image segmentation algorithm, based on Pulse-Coupled Neural Networks, was implemented in silicon. We aimed at simplifying neuron hardware implementation while maintaining segmentation efficiency. Some algorithmic tricks have then been added, improving the results. The main components of the underlying neuron architecture are a single 8 bits register, a simple incrementer, and some glue logic. A prototype, using a data flow architecture, implementing a 64x64 neuron array, and based on a 0.2 Μm CMOS SOI technology, will be released in 1998. A 64x64 segmentation is expected in less than 50 Μs.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1998

Authors and Affiliations

  • Jean -Luc Rebourg
    • 1
  • Jean -Denis Muller
    • 1
  • Manuel Samuelides
    • 2
  1. 1.Commissariat à l’Energie Atomique - DAMBruyères-le-ChâtelFrance
  2. 2.Office National d’Etudes et Recherches Aérospatiales - CERTToulouse CedexFrance

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