Abstract
We investigate about a lower bound on the size of a Boolean circuit that computes the clique function with a limited number of negation gates. To derive strong lower bounds on the size of such a circuit we develop a new approach by combining the three approaches: the restriction applied for constant depth circuits[Has], the approximation method applied for monotone circuits[Raz2] and boundary covering developed in the present paper. Based on the approach the following statement is established: If a circuit C with at most ⌈(1/6) log log m⌋ negation gates detects cliques of size \((\log m)^{3(\log {\mathbf{ }}m)^{{\raise0.5ex\hbox{$\scriptstyle 1$}\kern-0.1em/\kern-0.15em\lower0.25ex\hbox{$\scriptstyle 2$}}} }\) in a graph with m vertices, then C contains at least \(2^{({\raise0.5ex\hbox{$\scriptstyle 1$}\kern-0.1em/\kern-0.15em\lower0.25ex\hbox{$\scriptstyle 5$}})(\log {\mathbf{ }}m)^{(\log {\mathbf{ }}m)^{{\raise0.5ex\hbox{$\scriptstyle 1$}\kern-0.1em/\kern-0.15em\lower0.25ex\hbox{$\scriptstyle 2$}}} } }\) gates. In addition, we present a general relationship between negation-limited circuit size and monotone circuit size of an arbitrary monotone function.
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© 1998 Springer-Verlag Berlin Heidelberg
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Amano, K., Maruoka, A. (1998). A superpolynomial lower bound for a circuit computing the clique function with at most (1/6) log log n negation gates. In: Brim, L., Gruska, J., Zlatuška, J. (eds) Mathematical Foundations of Computer Science 1998. MFCS 1998. Lecture Notes in Computer Science, vol 1450. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055789
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DOI: https://doi.org/10.1007/BFb0055789
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