# Applying the classification theorem for finite simple groups to minimize pin count in uniform permutation architectures

## Abstract

In this paper, we show how to efficiently realize permutations of data stored in VLSI chips using bus interconnections with a small number of pins per chip. In particular, we show that permutations among chips from any group *G* can be uniformly realized in one step with a bus architecture that requires only \(\Theta (\sqrt {\left| G \right|} )\) pins per chip. The bound is within a small constant factor of optimal and solves the central question left open by the recent work of Kilian. Kipnis and Leiserson on uniform permutation architectures [8]. The proof makes use of the Classification Theorem for Finite Simple Groups to show that every finite group *G* of nonprime order contains a nontrivial subgroup of size at least \(\sqrt {\left| G \right|}\). The latter result is also optimal and improves the old pre-Classification Theorem lower bound of |*G*|^{1/3} proved by Brauer and Fowler [1] and Feit [4].

## Key Words

architecture busses Classification Theorem difference cover group theory pins simple groups VLSI## Preview

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## References

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