Optimal partitioning of programs for data flow machines

  • R. Hardon
  • S. Pinter
IX. Compilers for DataFlow Machines
Part of the Lecture Notes in Computer Science book series (LNCS, volume 589)


Data flow computers execute programs by dividing a data flow graph into instruction templates which are scheduled as early as possible. Implementing this scheme involves communication overheads which affect the running time of the program. In this paper we present a model for data flow machines which includes both communication and execution times. With this model we derive lower and upper bounds on the execution time of programs represented as trees and DAGs. We provide algorithms for optimally partitioning a program into sets of instruction templates, for both tree and DAG like programs, when there are enough execution units. The algorithms are of time complexity O(¦V¦2) and O(¦V¦5), respectively. For the case with limited number of execution units, we show that the algorithm presented for trees, approximates the best solution with a ratio of 4.


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  1. [1]
    A. Aggarwal, A.K.Chandra, and M.Snir. Communication complexity of PRAMs. In Proc. of the 15th International Coll. on Automata, Languages and Programming, Springer Verlag Lecture Notes in Computer Science, number 317, pages 1–18, July 1988.Google Scholar
  2. [2]
    A.P. Böhm and J.R.Gurd. Iterative instructions in the Manchester dataflow computer. IEEE Trans. on Parallel and Distributed Systems, 1(2), April 1990.Google Scholar
  3. [3]
    J.B. Dennis and D.P.Misunas. A preliminary architecture for a basic data flow processor. In 2nd annual Symposium on Computer Architecture, pages 126–132, 1974.Google Scholar
  4. [4]
    M.R. Garey and D.S.Johnson. Computers and Intractability: a Guide to the Theory of NP-completeness. W.H.freeman and company, 1979.Google Scholar
  5. [5]
    J.L. Gaudiot and M.D.Ercegovac. Performance evaluation of a simulated data flow computer with low resolution actors. Journal of Parallel and Distributed Computing, 2(4):321–351, 1985.Google Scholar
  6. [6]
    A.V. Goldberg and D.Gusfield. Book review: Flow algorithms by E.A.Dinic and A.V.Karzanov. Tech.Rep.STAN-CS-90-1313, June 1990.Google Scholar
  7. [7]
    R. Hardon and S. S. Pinter. Optimal partitioning of programs for data flow machines. Technical Report EE-PUB to appear, Dept. of Electrical Engineering, Technion — Israel Institute of Technology, 1991.Google Scholar
  8. [8]
    T.C. Hu. Parallel sequencing and assembly line problems. Operations Res., 9:841–848, 1961.Google Scholar
  9. [9]
    C.H. Papadimitriou and M.Yannakakis. Towards an architecture independent analysis of parallel algorithms. SIAM J. Computing, 19(2):322–328, April 1990.Google Scholar
  10. [10]
    S. Sakai, Y. Yamaguchi, k. Hiraki, Y. Kodama, and T. Yuba. An architecture of a dataflow single chip processor. In International Symposium on Computer Architecture, pages 46–53, 1989.Google Scholar
  11. [11]
    J.D. Ullman. NP-complete scheduling problems. Journal of Computer and System Sciences, 10(3):384–393, 1975.Google Scholar
  12. [12]
    A.H. Veen. Dataflow machine architecture. ACM Computing Surveys, 18(4):365–396, December 1986.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1992

Authors and Affiliations

  • R. Hardon
    • 1
  • S. Pinter
    • 1
  1. 1.Technion - Israel Institute of TechnologyUSA

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