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An interface device to support a distributed parallel system for the StrongARM microprocessor

  • B. C. O'Neill
  • G. Coulson
  • K. L. Wong
  • R. Hotchkiss
  • J. H. Ng
  • S. Clark
  • P. D. Thomas
5. Posters
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1401)

Abstract

This work describes a single chip interface between the StrongARM processor and the ICR C416 hardware message routing device. This allows the construction of a scaleable distributed parallel system with features similar to that of a transputer system but with the benefits of the higher clock speed and cache memory of the StrongARM. This interface has been implemented on an ALTFRA 10K FLEX series FPGA. The interface design and simulation results are outlined.

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References

  1. [1]
    CRAY T3D, Cray Research Inc., Chippewa Falls, WI, USA.Google Scholar
  2. [2]
    B C O'Neill, et al, ‘Design and Exploitation of a 26,000 Gate Message Routing Device', Fifth EURCHIP Workshop on VLSI Design Training,, Germany, Oct. 1994, pp290–303.Google Scholar
  3. [3]
    Digital Semiconductors SA-110 Microprocessor Technical Reference Manual, EC-QPWLC-TE, DEC Ltd, Maynard, Massachusetts, USA, 1996.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1998

Authors and Affiliations

  • B. C. O'Neill
    • 1
  • G. Coulson
    • 1
  • K. L. Wong
    • 1
  • R. Hotchkiss
    • 1
  • J. H. Ng
    • 1
  • S. Clark
    • 1
  • P. D. Thomas
    • 1
  1. 1.Faculty of Engineering & ComputingNottingham Trent UniversityNottinghamUK

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