Cmos continuous BAM with on chip learning
A complete VLSI Continuous Time Bidirectional Associative Memory (BAM) is presented. The short term memory (STM) section is implemented using small transconductance four quadrant multipliers and capacitors for the integrators. The long term memory (LTM) is built with an additional multiplier that uses locally available signals to perform Hebbian Learning. The value of the learned weight voltage can be refreshed using a simple 4 bit A/D-D/A conversion, that if done fast enough will maintain the weight within a 1/16 part of the complete weight range. Such a discretization still allows good performance of the STM section after learning is finished.
Unable to display preview. Download preview PDF.
- B. Kosko, “Adaptive Bidirectional Associative Memories”, Applied Optics, Vol. 26, No. 23, pp. 4947–4960, 1 December 1987.Google Scholar
- B. Kosko, “Bidirectional Associative Memories”, IEEE Trans. on Systems, Man, and Cybernetics, Vol. 18, No. 1, pp.49–60, January/February 1988.Google Scholar
- D.J. Weller and R.R. Spencer, “A Process Invariant Analog Neural Network IC with Dynamically Refreshed Weights”, Proc. Midwest Symposium on Circuits and Systems, Calgary, 1990.Google Scholar