Vlsi fully connected neural networks for the implementation of other topologies
In this paper, we study the alternatives for the implementation of any topology through a fully connected neural network. This strategy is based in the fact that, by the moment, most of the programmable VLSI neural networks implement this topology although associated computations usesdifferent strategies like analog computations, systolic or sequential digital computations. An efficient correspondence between a fully connected neural network and any other type of network can be done following one of this strategies: transparent strategies, for which the network is processed independently of its own topology as a fully connected network, and specialized strategies, for which submatrices are taken into account for the acceleration of the computations. The differences between the two strategies is basically related to the balance between the speed of the recall phase, and the complexity of the hardware. Finally we present two chips that implement a sequential dynamics with probabilistic criteria that follow the two strategies and evaluate the advantages and drawbacks of each one.
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