Program optimization for concurrent multithreaded architectures

Abstract

This paper presents some compiler and program transformation techniques for concurrent multithreaded architectures, in particular the superthreaded architecture [9], which adopts a thread pipelining execution model that allows threads with data dependences and control dependences to be executed in parallel. In this paper, we identify several important program analysis and transformation techniques that allow the superthreaded architecture to exploit more parallelism in programs with less run-time overhead. We evaluate the performance of the superthreaded architecture and the effectiveness of the program transformation techniques by manually compiling several benchmark programs and running them through a trace-driven, cycle-by-cycle superthreaded processor simulator. The simulation results show that a superthreaded processor can achieve promising speedups for most of the benchmark programs with the proposed program transformation techniques applied.

This work is supported in part by the National Science Foundation under Grant No. MIP 9610379; by the U.S. Army Intelligence Center and Fort Huachuca under Contract DABT63-95-C-0127 and ARPA order No. D 346; and by a gift from Intel Corporation.