A static scheduling heuristic for heterogeneous processors

  • Hyunok Oh
  • Soonhoi Ha
Workshop 17 Scheduling and Load Balancing
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1124)


This paper presents a static scheduling heuristic called bestimaginary-level (BIL) scheduling for heterogeneous processors. The input graph is an acyclic precedence graph, where a node has different execution times on different processors. The static level of a node, or BIL, incorporates the effect of interprocessor communication (IPC) overhead and processor heterogeneity. The proposed scheduling technique is proven to produce the optimal scheduling result if the topology of the input task graph is linear. The performance of the BIL scheduling is compared with an existing technique called the general dynamic level (GDL) scheduling with various classes of randomly generated input graphs, resulting in about 20% performance improvement.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1996

Authors and Affiliations

  • Hyunok Oh
    • 1
  • Soonhoi Ha
    • 1
  1. 1.The Department of Computer EngineeringSeoul National UniversitySeoulKorea

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