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Optimal fault-tolerant ATM-routings for biconnected graphs

  • Koichi Wada
  • Wei Chen
  • Yupin Luo
  • Kimio Kawaguchi
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1335)

Abstract

We study the problem of designing fault-tolerant virtual path layouts for an ATM network which is a biconnected network of n processors in the surviving route graph model. The surviving route graph for a graph G, a routing p and a set of faults F is a directed graph consisting of nonfaulty nodes with a directed edge from a node x to a node y iff there are no faults on the route from x to y. The diameter of the surviving route graph could be one of the fault-tolerance measures for the graph G and the routing p. When a routing is considered as a virtual path layout, we can discuss the fault tolerance of virtual path layouts in the ATM network. In this paper, we show that we construct three routings for any biconnected graph such that the diameter of the surviving route graphs is optimal and they satisfy some desirable properties of virtual path layouts in ATM networks.

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Copyright information

© Springer-Verlag Berlin Heidelberg 1997

Authors and Affiliations

  • Koichi Wada
    • 1
  • Wei Chen
    • 1
  • Yupin Luo
    • 2
  • Kimio Kawaguchi
    • 3
  1. 1.Nagoya Institute of TechnologyNagoya
  2. 2.Department of AutomationTsinghua UniversityBeijingP.R.China
  3. 3.Osaka Institute of TechnologyHirakataJapan

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