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Thread Synchronization Unit (TSU): A building block for high performance computers

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Book cover High Performance Computing (ISHPC 1997)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1336))

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Abstract

The Thread Synchronization Unit (TSU) is a hardware mechanism that provides data-driven thread synchronization and data consistency for multi-threaded architectures built with control-flow (i.e. commodity) microprocessors. The TSU design is based on the Decoupled Data-Driven model of execution. This model decouples the synchronization from the computation portions of a program and allows them to execute asynchronously. At compile time a program is partitioned into a number of threads of variable granularity and the Data-Driven thread synchronization graph is also constructed. The TSU is responsible for maintaining the synchronization graph implicitly, it determines when a thread is ready for execution without interruption and then feeds it to the microprocessor for execution. The TSU-based machines exhibit the tolerance to long memory and communication latencies, of the data-driven model, with very little overhead and also exploits short-term optimal cache placement and replacement policies.

This material is based upon work supported in part by the National Science Foundation under Grant No. CCR-93-095572 and in part by the University of Cyprus Research Council

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Constantine Polychronopoulos Kazuki Joe Keijiro Araki Makoto Amamiya

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© 1997 Springer-Verlag Berlin Heidelberg

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Evripidou, P. (1997). Thread Synchronization Unit (TSU): A building block for high performance computers. In: Polychronopoulos, C., Joe, K., Araki, K., Amamiya, M. (eds) High Performance Computing. ISHPC 1997. Lecture Notes in Computer Science, vol 1336. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0024209

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  • DOI: https://doi.org/10.1007/BFb0024209

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-63766-0

  • Online ISBN: 978-3-540-69644-5

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