Using partial-order semantics to avoid the state explosion problem in asynchronous systems

  • David K. Probst
  • Hon F. Li
II. Partial Orders
Part of the Lecture Notes in Computer Science book series (LNCS, volume 531)


We avoid state explosion in model checking of delay-insensitive VLSI systems by not using states. Systems are networks of communicating finite-state nonsequential processes with well-behaved nondeterministic choice. A specification strategy based on partial orders allows precise description of the branching and recurrence structure of processes. Process behaviors are modelled by pomsets, but (discrete) sets of pomsets with implicit branching structure are replaced by pomtrees, which have finite presentations by (automaton-like) behavior machines. The latter distinguish both concurrency and branching points, and define a finite recurrence structure. Safety and liveness checking are integrated. In contrast to state methods, our methods do not require enumeration or recording of states. We avoid separate consideration of execution sequences that do not differ in their partial order, and ensure termination by recording only a small number of system loop cutpoints — in the form of system behavior states. In spite of the name, behavior states are not states.


delay-insensitive system model checking state explosion partial-order semantics branching point recurrence structure behavior machine behavior state 


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [1]
    D.L. Dill, “Trace theory for automatic hierarchical verification of speed-independent circuits”, Ph. D. Thesis, Department of Computer Science, Carnegie Mellon University, Report CMU-CS-88-119, February 1988. Also MIT Press, 1989.Google Scholar
  2. [2]
    Z. Manna and A. Pnueli, “Specification and verification of concurrent programs by ∀-automata”, Proc. of 14th ACM Symposium on Principles of Programming Languages, January 1987, pp. 1–12.Google Scholar
  3. [3]
    A.J. Martin, “Compiling communicating processes into delay-insensitive VLSI circuits”, Distributed Computing, Vol. 1, No. 4, October 1986, pp. 226–234.Google Scholar
  4. [4]
    V.R. Pratt, “Modelling concurrency with partial orders”, Int. J. of Parallel Prog., Vol. 15, No. 1, February 1986, pp. 33–71.Google Scholar
  5. [5]
    D.K. Probst and H.F. Li, “Abstract specification of synchronous data types for VLSI and proving the correctness of systolic network implementations”, IEEE Trans. on Computers, Vol. C-37, No. 6, June 1988, pp. 710–720.Google Scholar
  6. [6]
    D.K. Probst and H.F. Li, “Abstract specification, composition and proof of correctness of delay-insensitive circuits and systems”, Technical Report, Department of Computer Science, Concordia University, CS-VLSI-88-2, April 1988 (Revised March 1989).Google Scholar
  7. [7]
    D.K. Probst and H.F. Li, “Partial-order model checking of delay-insensitive systems”. In R. Hobson et al. (Eds.), Canadian Conference on VLSI 1989, Proceedings, Vancouver, BC, October 1989, pp. 73–80.Google Scholar
  8. [8]
    J.v.d. Snepscheut, “Trace theory and VLSI design”, Lect. Notes in Comput. Sci. 200, Springer Verlag, 1985.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1991

Authors and Affiliations

  • David K. Probst
    • 1
  • Hon F. Li
    • 1
  1. 1.Department of Computer ScienceConcordia UniversityMontrealCanada

Personalised recommendations