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Vorschläge für die Organisation einer flexiblen Multiprozessoranlage

  • H. Schecher
Rechnerstrukturen
Part of the Lecture Notes in Computer Science book series (LNCS, volume 8)

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Literatur

  1. 1.
    IEEE Transactions on computers, Vol. C-17, No. 8 Aug. 1968 G.H. Barnes, R.M. Brown, M. Kato, D.J. Kuck, D.L. Slotnick, R.A. Stokes: The ILLIAC IV ComputerGoogle Scholar
  2. 2.
    IEEE Transactions on computers, June 1969 p. 520–529 L.J. Koczela, G.Y. Wang: The Design of a Highly Parallel Computer OrganizationGoogle Scholar
  3. 3.
    IEEE Transactions on computers, Vol. C-21, No. 1, Jan. 1972 William W. Plummer: Asynchronous ArbitersGoogle Scholar
  4. 4.
    IEEE Transactions on computers, Vol. C-20, No. 12, Dec. 1971 J.M. Daniel: Dynamic Resolution of Memory Access ConflictsGoogle Scholar
  5. 5.
    IEEE Transactions on computers, Vol. C-19, No. 1, Jan. 1970 H.S. Stone: The Organization of High-Speed Memory for Parallel Block Transfer of DataGoogle Scholar
  6. 6.
    IEEE Transactions on computers, Vol. C-19, No. 6, June 1970 Daniel P. Bovet: Multiprocessing systemsGoogle Scholar
  7. 7.
    IEEE Transactions on computers, Vol. C-18, No. 9, Sept. 1969 R.L. Davis: The ILLIAC IV Processing ElementGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1974

Authors and Affiliations

  • H. Schecher
    • 1
  1. 1.Abteilung Mathematik Gruppe InformatikTechnische Universität MünchenGermany

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