Abstract
This paper presents the implementation of the Hebbian learning rule in a hardware-friendly architecture based on a stochastic pulse representation of the signals. We compare implementation costs and speed of this approach with those of a parallel and a bit-serial implementation. The neural model includes both short- and long-term dynamics. Hence, networks composed of these neurons solve delayed reinforcement and adaptive timing tasks which has been shown in several real-world applications.
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© 1997 Springer-Verlag Berlin Heidelberg
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Rossmann, M., Bühlmeier, A., Manteuffel, G., Goser, K. (1997). Short- and long-term dynamics in a stochastic pulse stream neuron implemented in FPGA. In: Gerstner, W., Germond, A., Hasler, M., Nicoud, JD. (eds) Artificial Neural Networks — ICANN'97. ICANN 1997. Lecture Notes in Computer Science, vol 1327. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0020321
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DOI: https://doi.org/10.1007/BFb0020321
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