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Design of Multi-channel Ethernet System Based on FPGA

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Advances in Computer Science and Ubiquitous Computing (CUTECSA 2022)

Abstract

In some autonomous vehicle test scenarios, signal generators are required for generating the testing signals to simulate the real surrounding environment of the vehicle. This paper demonstrated a design scheme of multi-channel Ethernet system which can transmit the testing data through the multiple channels, a FPGA chip is used as the core device of the system, it can control the system to read the UDP frames stored in the two DDR4 DRAM chips integrated on board and processing them, by precisely time control, then the UDP data frames will be transmitted through corresponding Ethernet channel with a programmable time interval between the Ethernet channels, and each UDP frame transmission can be controlled. The result shows that each Ethernet channel of the system can transmit all the data correctly and timely, and its performance is quite stable and can be used as the multiple Ethernet signal generator in the autonomous vehicle testing scenarios.

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Correspondence to Yougu Ale .

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© 2023 The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

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Ale, Y., Xu, Y., Wu, C. (2023). Design of Multi-channel Ethernet System Based on FPGA. In: Park, J.S., Yang, L.T., Pan, Y., Park, J.H. (eds) Advances in Computer Science and Ubiquitous Computing. CUTECSA 2022. Lecture Notes in Electrical Engineering, vol 1028. Springer, Singapore. https://doi.org/10.1007/978-981-99-1252-0_17

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  • DOI: https://doi.org/10.1007/978-981-99-1252-0_17

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-99-1251-3

  • Online ISBN: 978-981-99-1252-0

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