Abstract
Excellent thermal conductivities, superior current capabilities and ballistic transport operation these prominent properties of carbon nanotube field-effect transistor technology make it superior or alternative approach over traditional CMOS and conventional FETs. A detailed simulation-based analysis of this technology with the evaluation of circuit performance of SRAM is presented here. Performance of CNTFET-based 6T SRAM and 7T SRAM is analyzed and compared in terms of static noise margin and static power dissipation. Variations of parameters for performance evaluation include fermi level, dielectric constant, oxide thickness, work function and chiral vector. The work has modelled in HSPICE software using Stanford CNTFET model for channel length of 32, 22, 16 and 7 nm. Evaluated results show that CNTFET-based 7T-SRAM has high static noise margins when compared with 6T-SRAM.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Zhang Z, Delgado-Frias JG (2011) Low power and metallic CNT tolerant CNTFET SRAM design. In: 11th IEEE International conference on nanotechnology, Portland Marriott, vol A247, pp 1177–1182
Prasad R, Madhavi BK, Lal Kishore K (2011) Design of low write-power consumption SRAM cell based on CNTFET at 32 nm technology. Int J VLSI Design Commun Syst (VLSICS) 2:167–177
Prasad R, Madhavi BK, Lal Kishore K (2012) Low leakage-power SRAM cell design using CNTFETs at 32 nm technology. LNICST 108:165–171
Murotiya SI, Matta A, Gupta A (2012) Performance evaluation of CNTFET-based SRAM cell design. Int J Electr Electron Eng (IJEEE) 2:78–83
Parimala Devi M, Sharmila D, Meenakshi K (2013) Comparative study of 8T SRAM cell using CMOS, FinFET and CNTFET in nanoscale technologies. Int J Electron Commun Technol 4:7–10
Sinhal SK, Kumar K, Chaudhurl S (2013) CNTFET: the emerging post-CMOS device. IEEE 8:372–374
Sun L, Mathew J, Shafik RA, Pradhan DK, Li Z (2014) A low power and robust carbon nanotube 6T SRAM design with metallic tolerance. EDAA 4:177–182
Ahmed SS, Makdey S, Bhoir D (2015) Performance enhancement of VLSI circuits using CNTFETs. Int J Eng Trends Technol (IJETT) 23:1–6
Jaiswal M, Singh AR (2015) Design and analysis of CNTFET-based SRAM. Int Res J Eng Technol (IRJET) 2:11–15
Nandy T, Dutta A, Mahmood ZH (2015) Analytical distinction between CNTFET based and Mosfet Based SRAMS and logic gates. Electr Electron Eng Int J (ELELIJ) 4:26–37
Sayed SI, Abutaleb MM, Nossair ZB (2016) Optimization of CNFET parameters for high performance digital circuits. Adv Mater Sci Eng 2016:1001–1009
Mohita TN, Roy T (2016) Design and stability analysis of CNTFET based SRAM cell. In: IEEE Students’ conference on electrical, electronics and computer science, vol 2, pp 77–81
Sardana N, Ragh LK (2016) Carbon nano tube field effect transistor: a review. Int J Eng Sci Res Technol 5:861–868
Rizvi A, Jaiswal P (2016) Study of CNTFET performance over MOSFET using digital logic circuits. IJVDCS 4:363–375
Singh A, Khosla M, Raj B (2016) CNTFET modeling and low power SRAM cell design. In: IEEE 5th Global conference on consumer electronics, vol 2, pp 5090–5094
Das S, Das D, Rahaman H (2016) Design of content addressable memory cell using carbon nanotube field effect transistors. In: Proceedings of the 2016 IEEE students’ technology symposium, vol 2, pp 131–135
Bhavar Sonali R, Khule RS (2017) Design and analysis on the Performance of CNTFET Based Inverter in nanometer regime. IJARIIE 3:1779–1784
Joshi S, Alabawi U (2017) Comparative analysis of 6T, 7T, 8T, 9T, and 10T realistic CNTFET based SRAM. Hindawi J Nanotechnol 2017:177–185
Spasova M, Nikolov D, Angelov G, Radonov R, Hristov M (2017) SRAM design based on carbon nanotube field effect transistor’s model with modified parameters, vol 2. IEEE, pp 1–4
Patel PK, Malik M, Gupta TK (2018) Design of an ultralow power CNTFET based 9T SRAM with shared BL and half select free techniques, vol 4, pp 1–9. wileyonlinelibrary.com/journal/jnm
Prakasha P, Mohana Sundarama K, Anto Bennetb M (2018) A review on carbon nanotube field effect transistors (CNTFETs) for ultra-low power applications. Renew Sustain Energy Rev 89:194–203
Divya MK, Singh G (2018) Performance analysis of CNFET based 6T SRAM. COJ Electron Commun 1:1–9
Tamil Selvan S, Sundararajan M (2018) Performance evaluation of 3 value logic 7t And 8t CNTFET based SRAM cell design. Int J Pure Appl Math 120:33–47
Maheswar Y, Raju BL, Soundara Rajan K (2019) 256K memory bank design with 9T SRAM bit cell and 22 nm CNTFET optimizing for low power and area. Int J Innov Technol Exploring Eng (IJITEE) 8:675–681
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2021 Springer Nature Singapore Pte Ltd.
About this paper
Cite this paper
Mathur, N., Birla, S. (2021). Performance Evaluation and Comparison of CNTFET-Based 7T SRAM with 6T SRAM. In: Mahapatra, R.P., Panigrahi, B.K., Kaushik, B.K., Roy, S. (eds) Proceedings of 6th International Conference on Recent Trends in Computing. Lecture Notes in Networks and Systems, vol 177. Springer, Singapore. https://doi.org/10.1007/978-981-33-4501-0_12
Download citation
DOI: https://doi.org/10.1007/978-981-33-4501-0_12
Published:
Publisher Name: Springer, Singapore
Print ISBN: 978-981-33-4500-3
Online ISBN: 978-981-33-4501-0
eBook Packages: Intelligent Technologies and RoboticsIntelligent Technologies and Robotics (R0)